containerd/vendor/golang.org/x/sys/cpu/cpu_wasm.go
CarlosEDP fb6b0ae4c6 Update x/sys, x/net and bbolt modules to support Risc-V
Signed-off-by: CarlosEDP <me@carlosedp.com>
2019-06-07 17:54:32 -03:00

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Go

// Copyright 2019 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
// +build wasm
package cpu
// We're compiling the cpu package for an unknown (software-abstracted) CPU.
// Make CacheLinePad an empty struct and hope that the usual struct alignment
// rules are good enough.
const cacheLineSize = 0
func doinit() {}