diff --git a/inc/ocf_def.h b/inc/ocf_def.h index 3f80786..01d0d37 100644 --- a/inc/ocf_def.h +++ b/inc/ocf_def.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -281,16 +281,6 @@ typedef enum { /*!< Force enum to be 64-bit */ } ocf_cache_line_size_t; -/** - * Metadata layout - */ -typedef enum { - ocf_metadata_layout_striping = 0, - ocf_metadata_layout_seq = 1, - ocf_metadata_layout_max, - ocf_metadata_layout_default = ocf_metadata_layout_striping -} ocf_metadata_layout_t; - /** * @name OCF IO class definitions */ diff --git a/inc/ocf_mngt.h b/inc/ocf_mngt.h index e40d21a..de43f14 100644 --- a/inc/ocf_mngt.h +++ b/inc/ocf_mngt.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -260,11 +260,6 @@ struct ocf_mngt_cache_config { */ ocf_cache_line_size_t cache_line_size; - /** - * @brief Metadata layout (stripping/sequential) - */ - ocf_metadata_layout_t metadata_layout; - bool metadata_volatile; /** @@ -308,7 +303,6 @@ static inline void ocf_mngt_cache_config_set_default( cfg->cache_mode = ocf_cache_mode_default; cfg->promotion_policy = ocf_promotion_default; cfg->cache_line_size = ocf_cache_line_size_4; - cfg->metadata_layout = ocf_metadata_layout_default; cfg->metadata_volatile = false; cfg->backfill.max_queue_size = 65536; cfg->backfill.queue_unblock_size = 60000; diff --git a/src/engine/engine_common.c b/src/engine/engine_common.c index 926911a..74b18b5 100644 --- a/src/engine/engine_common.c +++ b/src/engine/engine_common.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -107,8 +107,8 @@ static inline bool ocf_engine_clines_phys_cont(struct ocf_request *req, if (entry1->status == LOOKUP_MISS || entry2->status == LOOKUP_MISS) return false; - phys1 = ocf_metadata_map_lg2phy(req->cache, entry1->coll_idx); - phys2 = ocf_metadata_map_lg2phy(req->cache, entry2->coll_idx); + phys1 = entry1->coll_idx; + phys2 = entry2->coll_idx; return phys1 < phys2 && phys1 + 1 == phys2; } diff --git a/src/engine/engine_wo.c b/src/engine/engine_wo.c index 1b6f61e..a5b0fd2 100644 --- a/src/engine/engine_wo.c +++ b/src/engine/engine_wo.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2019-2021 Intel Corporation + * Copyright(c) 2019-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -79,8 +79,7 @@ static int ocf_read_wo_cache_do(struct ocf_request *req) * previous cacheline(s) */ phys_prev = phys_curr; if (entry->status != LOOKUP_MISS) - phys_curr = ocf_metadata_map_lg2phy(cache, - entry->coll_idx); + phys_curr = entry->coll_idx; if (io && phys_prev + 1 != phys_curr) { ocf_read_wo_cache_io(req, io_start, offset - io_start); io = false; diff --git a/src/metadata/metadata.c b/src/metadata/metadata.c index 8c9c863..261ecc1 100644 --- a/src/metadata/metadata.c +++ b/src/metadata/metadata.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -634,23 +634,11 @@ static void ocf_metadata_flush_unlock_collision_page( page); } -static void ocf_metadata_init_layout(struct ocf_cache *cache, - ocf_metadata_layout_t layout) -{ - ENV_BUG_ON(layout >= ocf_metadata_layout_max || layout < 0); - - /* Initialize metadata location interface*/ - if (cache->metadata.is_volatile) - layout = ocf_metadata_layout_seq; - cache->metadata.layout = layout; -} - /* * Initialize hash metadata interface */ int ocf_metadata_init_variable_size(struct ocf_cache *cache, - uint64_t device_size, ocf_cache_line_size_t line_size, - ocf_metadata_layout_t layout) + uint64_t device_size, ocf_cache_line_size_t line_size) { int result = 0; uint32_t i = 0; @@ -683,8 +671,6 @@ int ocf_metadata_init_variable_size(struct ocf_cache *cache, ctrl->mapping_size = ocf_metadata_status_sizeof(line_size) + sizeof(struct ocf_metadata_map); - ocf_metadata_init_layout(cache, layout); - /* Initial setup of dynamic size RAW containers */ for (i = metadata_segment_variable_size_start; i < metadata_segment_max; i++) { @@ -1268,7 +1254,6 @@ static int ocf_metadata_load_atomic_metadata_drain(void *priv, ctx_data_rd_check(cache->owner, &meta, data, sizeof(meta)); line = (sector_addr + i) / ocf_line_sectors(cache); - line = ocf_metadata_map_phy2lg(cache, line); pos = (sector_addr + i) % ocf_line_sectors(cache); core_seq_no = meta.core_seq_no; core_line = meta.core_line; @@ -1631,7 +1616,6 @@ static void ocf_metadata_load_properties_cmpl( OCF_CMPL_RET(priv, result, NULL); properties.line_size = superblock->line_size; - properties.layout = superblock->metadata_layout; properties.cache_mode = superblock->cache_mode; properties.shutdown_status = superblock->clean_shutdown; properties.dirty_flushed = superblock->dirty_flushed; diff --git a/src/metadata/metadata.h b/src/metadata/metadata.h index 23e1844..d7d03ff 100644 --- a/src/metadata/metadata.h +++ b/src/metadata/metadata.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -44,8 +44,7 @@ int ocf_metadata_init(struct ocf_cache *cache, * @return 0 - Operation success otherwise failure */ int ocf_metadata_init_variable_size(struct ocf_cache *cache, - uint64_t device_size, ocf_cache_line_size_t cache_line_size, - ocf_metadata_layout_t layout); + uint64_t device_size, ocf_cache_line_size_t cache_line_size); /** * @brief Initialize collision table @@ -199,7 +198,6 @@ void ocf_metadata_set_hash(struct ocf_cache *cache, struct ocf_metadata_load_properties { enum ocf_metadata_shutdown_status shutdown_status; uint8_t dirty_flushed; - ocf_metadata_layout_t layout; ocf_cache_mode_t cache_mode; ocf_cache_line_size_t line_size; char *cache_name; diff --git a/src/metadata/metadata_collision.c b/src/metadata/metadata_collision.c index 6532010..20710bf 100644 --- a/src/metadata/metadata_collision.c +++ b/src/metadata/metadata_collision.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,143 +8,6 @@ #include "metadata_internal.h" #include "../utils/utils_cache_line.h" -static ocf_cache_line_t ocf_metadata_map_lg2phy_seq( - struct ocf_cache *cache, ocf_cache_line_t coll_idx) -{ - return coll_idx; -} - -static ocf_cache_line_t ocf_metadata_map_phy2lg_seq( - struct ocf_cache *cache, ocf_cache_line_t cache_line) -{ - return cache_line; -} - -/** - * This function is mapping collision index to appropriate cache line - * (logical cache line to physical one mapping). - * - * It is necessary because we want to generate sequential workload with - * data to cache device. - * Our collision list, for example, looks: - * 0 3 6 9 - * 1 4 7 10 - * 2 5 8 - * All collision index in each column is on the same page - * on cache device. We don't want send request x times to the same - * page. To don't do it we use collision index by row, but in this - * case we can't use collision index directly as cache line, - * because we will generate non sequential workload (we will write - * pages: 0 -> 3 -> 6 ...). To map collision index in correct way - * we use this function. - * - * After use this function, collision index in the above array - * corresponds with below cache line: - * 0 1 2 3 - * 4 5 6 7 - * 8 9 10 - * - * @param cache - cache instance - * @param idx - index in collision list - * @return mapped cache line - */static ocf_cache_line_t ocf_metadata_map_lg2phy_striping( - struct ocf_cache *cache, ocf_cache_line_t coll_idx) -{ - ocf_cache_line_t cache_line = 0, offset = 0; - struct ocf_metadata_ctrl *ctrl = - (struct ocf_metadata_ctrl *) cache->metadata.priv; - unsigned int entries_in_page = - ctrl->raw_desc[metadata_segment_collision].entries_in_page; - unsigned int pages = - ctrl->raw_desc[metadata_segment_collision].ssd_pages; - ocf_cache_line_t collision_table_entries = - cache->device->collision_table_entries; - ocf_cache_line_t delta = - (entries_in_page * pages) - collision_table_entries; - unsigned int row = coll_idx % entries_in_page; - - if (row > entries_in_page - delta) - offset = row - (entries_in_page - delta); - else - offset = 0; - - cache_line = (row * pages) + (coll_idx / entries_in_page) - offset; - return cache_line; -} - -/** - * @brief Map physical cache line on cache device to logical one - * @note This function is the inverse of map_coll_idx_to_cache_line - * - * @param cache Cache instance - * @param phy Physical cache line of cache device - * @return Logical cache line - */ -static ocf_cache_line_t ocf_metadata_map_phy2lg_striping( - struct ocf_cache *cache, ocf_cache_line_t cache_line) -{ - ocf_cache_line_t coll_idx = 0; - - struct ocf_metadata_ctrl *ctrl = - (struct ocf_metadata_ctrl *) cache->metadata.priv; - - struct ocf_metadata_raw *raw = - &ctrl->raw_desc[metadata_segment_collision]; - - unsigned int pages = raw->ssd_pages; - unsigned int entries_in_page = raw->entries_in_page; - unsigned int entries_in_last_page = raw->entries % entries_in_page ?: - entries_in_page; - - unsigned int row = 0, coll = 0; - - unsigned int last = entries_in_last_page * pages; - - if (cache_line < last) { - row = cache_line % pages; - coll = cache_line / pages; - } else { - cache_line -= last; - row = cache_line % (pages - 1); - coll = cache_line / (pages - 1) + entries_in_last_page; - } - - coll_idx = (row * entries_in_page) + coll; - - return coll_idx; -} -ocf_cache_line_t ocf_metadata_map_lg2phy( - struct ocf_cache *cache, ocf_cache_line_t coll_idx) -{ - switch (cache->metadata.layout) { - case ocf_metadata_layout_striping: - return ocf_metadata_map_lg2phy_striping( - cache, coll_idx); - case ocf_metadata_layout_seq: - return ocf_metadata_map_lg2phy_seq( - cache, coll_idx); - default: - ENV_BUG(); - return 0; - } -} - -ocf_cache_line_t ocf_metadata_map_phy2lg( - struct ocf_cache *cache, ocf_cache_line_t cache_line) -{ - switch (cache->metadata.layout) { - case ocf_metadata_layout_striping: - return ocf_metadata_map_phy2lg_striping( - cache, cache_line); - case ocf_metadata_layout_seq: - return ocf_metadata_map_phy2lg_seq( - cache, cache_line); - default: - ENV_BUG(); - return 0; - } -} - void ocf_metadata_set_collision_info(struct ocf_cache *cache, ocf_cache_line_t line, ocf_cache_line_t next, ocf_cache_line_t prev) diff --git a/src/metadata/metadata_collision.h b/src/metadata/metadata_collision.h index 7e8bca7..9a76ad1 100644 --- a/src/metadata/metadata_collision.h +++ b/src/metadata/metadata_collision.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -34,12 +34,6 @@ struct ocf_metadata_map { /*!< Entry status structure e.g. valid, dirty...*/ } __attribute__((packed)); -ocf_cache_line_t ocf_metadata_map_lg2phy( - struct ocf_cache *cache, ocf_cache_line_t coll_idx); - -ocf_cache_line_t ocf_metadata_map_phy2lg( - struct ocf_cache *cache, ocf_cache_line_t cache_line); - void ocf_metadata_set_collision_info( struct ocf_cache *cache, ocf_cache_line_t line, ocf_cache_line_t next, ocf_cache_line_t prev); diff --git a/src/metadata/metadata_raw_atomic.c b/src/metadata/metadata_raw_atomic.c index 1b77c56..7db099d 100644 --- a/src/metadata/metadata_raw_atomic.c +++ b/src/metadata/metadata_raw_atomic.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -109,7 +109,7 @@ void raw_atomic_flush_mark(struct ocf_cache *cache, struct ocf_request *req, static inline void _raw_atomic_add_page(struct ocf_cache *cache, uint32_t *clines_tab, uint64_t line, int *idx) { - clines_tab[*idx] = ocf_metadata_map_lg2phy(cache, line); + clines_tab[*idx] = line; (*idx)++; } @@ -122,7 +122,7 @@ static int _raw_atomic_flush_do_asynch_sec(struct ocf_cache *cache, uint64_t start_addr; int result = 0; - start_addr = ocf_metadata_map_lg2phy(cache, map->coll_idx); + start_addr = map->coll_idx; start_addr *= ocf_line_size(cache); start_addr += cache->device->metadata_offset; diff --git a/src/metadata/metadata_structs.h b/src/metadata/metadata_structs.h index ee2fddd..d9f2990 100644 --- a/src/metadata/metadata_structs.h +++ b/src/metadata/metadata_structs.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -60,9 +60,6 @@ struct ocf_metadata_lock * @brief Metadata control structure */ struct ocf_metadata { - ocf_metadata_layout_t layout; - /*!< Per-cacheline metadata layout */ - void *priv; /*!< Private data of metadata service interface */ diff --git a/src/metadata/metadata_superblock.c b/src/metadata/metadata_superblock.c index c4140ff..691e397 100644 --- a/src/metadata/metadata_superblock.c +++ b/src/metadata/metadata_superblock.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2020-2021 Intel Corporation + * Copyright(c) 2020-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -167,11 +167,6 @@ int ocf_metadata_validate_superblock(ocf_ctx_t ctx, return -OCF_ERR_INVAL; } - if ((unsigned)superblock->metadata_layout >= ocf_metadata_layout_max) { - ocf_log_invalid_superblock("metadata layout"); - return -OCF_ERR_INVAL; - } - if (superblock->core_count > OCF_CORE_MAX) { ocf_log_invalid_superblock("core count"); return -OCF_ERR_INVAL; diff --git a/src/metadata/metadata_superblock.h b/src/metadata/metadata_superblock.h index 073abe3..e421760 100644 --- a/src/metadata/metadata_superblock.h +++ b/src/metadata/metadata_superblock.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -40,7 +40,6 @@ struct ocf_superblock_config { uint32_t valid_parts_no; ocf_cache_line_size_t line_size; - ocf_metadata_layout_t metadata_layout; uint32_t core_count; unsigned long valid_core_bitmap[(OCF_CORE_MAX / diff --git a/src/mngt/ocf_mngt_cache.c b/src/mngt/ocf_mngt_cache.c index 01b61c7..10ee7be 100644 --- a/src/mngt/ocf_mngt_cache.c +++ b/src/mngt/ocf_mngt_cache.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -76,9 +76,6 @@ struct ocf_cache_mngt_init_params { ocf_cache_line_size_t line_size; /*!< Metadata cache line size */ - ocf_metadata_layout_t layout; - /*!< Metadata layout (striping/sequential) */ - ocf_cache_mode_t cache_mode; /*!< cache mode */ @@ -157,9 +154,6 @@ struct ocf_cache_attach_context { ocf_cache_line_size_t line_size; /*!< Metadata cache line size */ - ocf_metadata_layout_t layout; - /*!< Metadata layout (striping/sequential) */ - ocf_cache_mode_t cache_mode; /*!< cache mode */ @@ -1135,7 +1129,6 @@ static void _ocf_mngt_load_read_properties_end(void *priv, int error, context->metadata.shutdown_status = properties->shutdown_status; context->metadata.dirty_flushed = properties->dirty_flushed; context->metadata.line_size = properties->line_size; - cache->conf_meta->metadata_layout = properties->layout; cache->conf_meta->cache_mode = properties->cache_mode; ocf_pipeline_next(context->pipeline); @@ -1191,8 +1184,7 @@ static void _ocf_mngt_attach_prepare_metadata(ocf_pipeline_t pipeline, * Initialize variable size metadata segments */ ret = ocf_metadata_init_variable_size(cache, context->volume_size, - context->metadata.line_size, - cache->conf_meta->metadata_layout); + context->metadata.line_size); if (ret) OCF_PL_FINISH_RET(pipeline, ret); @@ -1361,7 +1353,6 @@ static void _ocf_mngt_cache_init(ocf_cache_t cache, * Super block elements initialization */ cache->conf_meta->cache_mode = params->metadata.cache_mode; - cache->conf_meta->metadata_layout = params->metadata.layout; cache->conf_meta->promotion_policy_type = params->metadata.promotion_policy; __set_cleaning_policy(cache, ocf_cleaning_default); @@ -1387,7 +1378,6 @@ static int _ocf_mngt_cache_start(ocf_ctx_t ctx, ocf_cache_t *cache, params.ctx = ctx; params.metadata.cache_mode = cfg->cache_mode; - params.metadata.layout = cfg->metadata_layout; params.metadata.line_size = cfg->cache_line_size; params.metadata_volatile = cfg->metadata_volatile; params.metadata.promotion_policy = cfg->promotion_policy; @@ -2402,13 +2392,6 @@ static void _ocf_mngt_activate_check_superblock(ocf_pipeline_t pipeline, if (result) OCF_PL_FINISH_RET(pipeline, result); - if (cache->conf_meta->metadata_layout != cache->metadata.layout) { - ocf_cache_log(cache, log_err, "Failed to activate standby instance: " - "invaild metadata layout\n"); - OCF_PL_FINISH_RET(context->pipeline, - -OCF_ERR_METADATA_LAYOUT_MISMATCH); - } - if (cache->conf_meta->line_size != cache->metadata.line_size) { ocf_cache_log(cache, log_err, "Failed to activate standby instance: " "invaild cache line size\n"); @@ -2867,11 +2850,6 @@ static int _ocf_mngt_cache_validate_cfg(struct ocf_mngt_cache_config *cfg) if (!ocf_cache_line_size_is_valid(cfg->cache_line_size)) return -OCF_ERR_INVALID_CACHE_LINE_SIZE; - if (cfg->metadata_layout >= ocf_metadata_layout_max || - cfg->metadata_layout < 0) { - return -OCF_ERR_INVAL; - } - if (cfg->backfill.queue_unblock_size > cfg->backfill.max_queue_size ) return -OCF_ERR_INVAL; diff --git a/src/ocf_metadata.c b/src/ocf_metadata.c index a6305a3..f43b61c 100644 --- a/src/ocf_metadata.c +++ b/src/ocf_metadata.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ #include "ocf_priv.h" @@ -10,8 +10,7 @@ static inline ocf_cache_line_t ocf_atomic_addr2line( struct ocf_cache *cache, uint64_t addr) { addr -= cache->device->metadata_offset; - addr = ocf_bytes_2_lines(cache, addr); - return ocf_metadata_map_phy2lg(cache, addr); + return ocf_bytes_2_lines(cache, addr); } static inline uint8_t ocf_atomic_addr2pos(struct ocf_cache *cache, diff --git a/src/utils/utils_cleaner.c b/src/utils/utils_cleaner.c index b8ebb55..aec5ae9 100644 --- a/src/utils/utils_cleaner.c +++ b/src/utils/utils_cleaner.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -684,8 +684,7 @@ static int _ocf_cleaner_fire_cache(struct ocf_request *req) OCF_DEBUG_PARAM(req->cache, "Cache read, line = %u", iter->coll_idx); - addr = ocf_metadata_map_lg2phy(cache, - iter->coll_idx); + addr = iter->coll_idx; addr *= ocf_line_size(cache); addr += cache->device->metadata_offset; diff --git a/src/utils/utils_io.c b/src/utils/utils_io.c index 50f15bd..f969646 100644 --- a/src/utils/utils_io.c +++ b/src/utils/utils_io.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2012-2021 Intel Corporation + * Copyright(c) 2012-2022 Intel Corporation * SPDX-License-Identifier: BSD-3-Clause */ @@ -241,8 +241,7 @@ void ocf_submit_cache_reqs(struct ocf_cache *cache, ENV_BUG_ON(first_cl + reqs > req->core_line_count); if (reqs == 1) { - addr = ocf_metadata_map_lg2phy(cache, - req->map[first_cl].coll_idx); + addr = req->map[first_cl].coll_idx; addr *= ocf_line_size(cache); addr += cache->device->metadata_offset; addr += ((req->byte_position + offset) % ocf_line_size(cache)); @@ -273,8 +272,7 @@ void ocf_submit_cache_reqs(struct ocf_cache *cache, /* Issue requests to cache. */ for (i = 0; i < reqs; i++) { - addr = ocf_metadata_map_lg2phy(cache, - req->map[first_cl + i].coll_idx); + addr = req->map[first_cl + i].coll_idx; addr *= ocf_line_size(cache); addr += cache->device->metadata_offset; bytes = ocf_line_size(cache); diff --git a/tests/functional/pyocf/types/cache.py b/tests/functional/pyocf/types/cache.py index 3efc8ca..75a6fb6 100644 --- a/tests/functional/pyocf/types/cache.py +++ b/tests/functional/pyocf/types/cache.py @@ -1,5 +1,5 @@ # -# Copyright(c) 2019-2021 Intel Corporation +# Copyright(c) 2019-2022 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause # @@ -52,7 +52,6 @@ class CacheConfig(Structure): ("_cache_mode", c_uint32), ("_promotion_policy", c_uint32), ("_cache_line_size", c_uint64), - ("_metadata_layout", c_uint32), ("_metadata_volatile", c_bool), ("_locked", c_bool), ("_pt_unaligned_io", c_bool), @@ -173,7 +172,6 @@ class Cache: cache_mode: CacheMode = CacheMode.DEFAULT, promotion_policy: PromotionPolicy = PromotionPolicy.DEFAULT, cache_line_size: CacheLineSize = CacheLineSize.DEFAULT, - metadata_layout: MetadataLayout = MetadataLayout.DEFAULT, metadata_volatile: bool = False, max_queue_size: int = DEFAULT_BACKFILL_QUEUE_SIZE, queue_unblock_size: int = DEFAULT_BACKFILL_UNBLOCK, @@ -188,7 +186,6 @@ class Cache: self.cache_mode = cache_mode self.promotion_policy = promotion_policy self.cache_line_size = cache_line_size - self.metadata_layout = metadata_layout self.metadata_volatile = metadata_volatile self.max_queue_size = max_queue_size self.queue_unblock_size = queue_unblock_size @@ -211,7 +208,6 @@ class Cache: _cache_mode=self.cache_mode, _promotion_policy=self.promotion_policy, _cache_line_size=self.cache_line_size, - _metadata_layout=self.metadata_layout, _metadata_volatile=self.metadata_volatile, _backfill=Backfill( _max_queue_size=self.max_queue_size, diff --git a/tests/functional/tests/management/test_start_stop.py b/tests/functional/tests/management/test_start_stop.py index 787bc39..8e96b36 100644 --- a/tests/functional/tests/management/test_start_stop.py +++ b/tests/functional/tests/management/test_start_stop.py @@ -1,5 +1,5 @@ # -# Copyright(c) 2019-2021 Intel Corporation +# Copyright(c) 2019-2022 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause # @@ -153,7 +153,6 @@ def test_start_params(pyocf_ctx, mode: CacheMode, cls: CacheLineSize, layout: Me cache_mode=mode, cache_line_size=cls, name=name, - metadata_layout=MetadataLayout.SEQUENTIAL, metadata_volatile=volatile_metadata, max_queue_size=queue_size, queue_unblock_size=unblock_size, @@ -164,7 +163,7 @@ def test_start_params(pyocf_ctx, mode: CacheMode, cls: CacheLineSize, layout: Me assert stats["conf"]["cache_mode"] == mode, "Cache mode" assert stats["conf"]["cache_line_size"] == cls, "Cache line size" assert cache.get_name() == name, "Cache name" - # TODO: metadata_layout, metadata_volatile, max_queue_size, + # TODO: metadata_volatile, max_queue_size, # queue_unblock_size, pt_unaligned_io, use_submit_fast # TODO: test in functional tests diff --git a/tests/functional/tests/security/conftest.py b/tests/functional/tests/security/conftest.py index 0381999..6a52b14 100644 --- a/tests/functional/tests/security/conftest.py +++ b/tests/functional/tests/security/conftest.py @@ -1,5 +1,5 @@ # -# Copyright(c) 2019-2021 Intel Corporation +# Copyright(c) 2019-2022 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause # @@ -82,10 +82,3 @@ def not_cache_line_size_randomize(request): ) def not_promotion_policy_randomize(request): return request.param - - -@pytest.fixture( - params=RandomGenerator(DefaultRanges.UINT32).exclude_range(enum_range(MetadataLayout)) -) -def not_metadata_layout_randomize(request): - return request.param diff --git a/tests/functional/tests/security/test_management_start_fuzzy.py b/tests/functional/tests/security/test_management_start_fuzzy.py index 2af5e91..87296c3 100644 --- a/tests/functional/tests/security/test_management_start_fuzzy.py +++ b/tests/functional/tests/security/test_management_start_fuzzy.py @@ -1,5 +1,5 @@ # -# Copyright(c) 2019-2021 Intel Corporation +# Copyright(c) 2019-2022 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause # @@ -73,25 +73,6 @@ def test_fuzzy_start_name(pyocf_ctx, string_randomize, cm, cls): cache.stop() -@pytest.mark.security -@pytest.mark.parametrize("cm", CacheMode) -@pytest.mark.parametrize("cls", CacheLineSize) -def test_fuzzy_start_metadata_layout(pyocf_ctx, not_metadata_layout_randomize, cm, cls): - """ - Test whether it is impossible to start cache with invalid metadata layout value. - :param pyocf_ctx: basic pyocf context fixture - :param c_uint32_randomize: metadata layout enum value to start cache with - :param cm: cache mode value to start cache with - :param cls: cache line size value to start cache with - """ - with pytest.raises(OcfError, match="OCF_ERR_INVAL"): - try_start_cache( - metadata_layout=not_metadata_layout_randomize, - cache_mode=cm, - cache_line_size=cls - ) - - @pytest.mark.security @pytest.mark.parametrize("cls", CacheLineSize) @pytest.mark.parametrize('max_wb_queue_size', RandomGenerator(DefaultRanges.UINT32, 10))