99c8c05f3f
This feature provides double buffering of config sections to prevent situation when power failure during metadata flush leads to partially updated metadata. Flapping mechanism makes it always possible to perform graceful rollback to previous config metadata content in such situation. Signed-off-by: Robert Baldyga <robert.baldyga@intel.com>
76 lines
1.6 KiB
C
76 lines
1.6 KiB
C
/*
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* Copyright(c) 2012-2021 Intel Corporation
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "metadata.h"
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#include "metadata_segment_id.h"
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#include "metadata_raw.h"
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#include "metadata_io.h"
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#include "metadata_raw_volatile.h"
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/*
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* RAW volatile Implementation - Size on SSD
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*/
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uint32_t raw_volatile_size_on_ssd(struct ocf_metadata_raw *raw)
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{
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return 0;
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}
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/*
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* RAW volatile Implementation - Checksum
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*/
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uint32_t raw_volatile_checksum(ocf_cache_t cache,
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struct ocf_metadata_raw *raw)
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{
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return 0;
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}
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/*
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* RAW volatile Implementation - Update
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*/
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int raw_volatile_update(ocf_cache_t cache,
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struct ocf_metadata_raw *raw, ctx_data_t *data,
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uint64_t page, uint64_t count)
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{
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/* Do nothing on purpose. */
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return 0;
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}
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/*
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* RAW volatile Implementation - Load all metadata elements from SSD
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*/
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void raw_volatile_load_all(ocf_cache_t cache, struct ocf_metadata_raw *raw,
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ocf_metadata_end_t cmpl, void *priv, unsigned flapping_idx)
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{
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cmpl(priv, -OCF_ERR_NOT_SUPP);
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}
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/*
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* RAM Implementation - Flush all elements
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*/
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void raw_volatile_flush_all(ocf_cache_t cache, struct ocf_metadata_raw *raw,
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ocf_metadata_end_t cmpl, void *priv, unsigned flapping_idx)
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{
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cmpl(priv, 0);
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}
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/*
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* RAM RAM Implementation - Mark to Flush
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*/
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void raw_volatile_flush_mark(ocf_cache_t cache, struct ocf_request *req,
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uint32_t map_idx, int to_state, uint8_t start, uint8_t stop)
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{
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}
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/*
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* RAM RAM Implementation - Do Flush asynchronously
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*/
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int raw_volatile_flush_do_asynch(ocf_cache_t cache,
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struct ocf_request *req, struct ocf_metadata_raw *raw,
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ocf_req_end_t complete)
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{
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complete(req, 0);
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return 0;
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}
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