Get all cache modes which traits include those provided as argument

Signed-off-by: Daniel Madej <daniel.madej@intel.com>
This commit is contained in:
Daniel Madej 2020-02-07 13:02:26 +01:00
parent 5b0413b3fd
commit 475ddb0050

View File

@ -1,12 +1,13 @@
#
# Copyright(c) 2019 Intel Corporation
# Copyright(c) 2019-2020 Intel Corporation
# SPDX-License-Identifier: BSD-3-Clause-Clear
#
from aenum import Enum, IntFlag
from test_utils.size import Size, Unit
from attotime import attotimedelta
from test_utils.size import Size, Unit
class CacheLineSize(Enum):
LINE_4KiB = Size(4, Unit.KibiByte)
@ -20,6 +21,12 @@ class CacheLineSize(Enum):
return int(self.value.get_value())
class CacheModeTrait(IntFlag):
InsertWrite = 1
InsertRead = 2
LazyFlush = 4
class CacheMode(Enum):
WT = "Write-Through"
WB = "Write-Back"
@ -34,7 +41,7 @@ class CacheMode(Enum):
@staticmethod
def get_traits(cache_mode):
if cache_mode == CacheMode.PT:
return 0
return CacheModeTrait(0)
elif cache_mode == CacheMode.WT:
return CacheModeTrait.InsertRead | CacheModeTrait.InsertWrite
elif cache_mode == CacheMode.WB:
@ -44,11 +51,11 @@ class CacheMode(Enum):
elif cache_mode == CacheMode.WA:
return CacheModeTrait.InsertRead
class CacheModeTrait(IntFlag):
InsertWrite = 1
InsertRead = 2
LazyFlush = 4
@staticmethod
def with_traits(flags: CacheModeTrait):
return [
m for m in CacheMode if all(map(lambda t: t in CacheMode.get_traits(m), flags))
]
class SeqCutOffPolicy(Enum):