Add cache mode traits
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@ -3,8 +3,7 @@
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# SPDX-License-Identifier: BSD-3-Clause-Clear
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#
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from enum import IntEnum
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from aenum import Enum
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from aenum import Enum, IntFlag
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from test_utils.size import Size, Unit
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from attotime import attotimedelta
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@ -27,11 +26,34 @@ class CacheMode(Enum):
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WA = "Write-Around"
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PT = "Pass-Through"
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WO = "Write-Only"
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WI = "Write-Invalidate"
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DEFAULT = WT
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def __str__(self):
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return self.value
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@staticmethod
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def get_traits(cache_mode):
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if cache_mode == CacheMode.PT:
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return 0
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elif cache_mode == CacheMode.WT:
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return CacheModeTrait.InsertRead | CacheModeTrait.InsertWrite
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elif cache_mode == CacheMode.WB:
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return CacheModeTrait.InsertRead | CacheModeTrait.InsertWrite | CacheModeTrait.LazyFlush
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elif cache_mode == CacheMode.WO:
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return CacheModeTrait.InsertWrite | CacheModeTrait.LazyFlush
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elif cache_mode == CacheMode.WA:
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return CacheModeTrait.InsertRead
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elif cache_mode == CacheMode.WI:
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return CacheModeTrait.InsertRead | CacheModeTrait.WriteInvalidate
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class CacheModeTrait(IntFlag):
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InsertWrite = 1
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InsertRead = 2
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LazyFlush = 4
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WriteInvalidate = 8
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class SeqCutOffPolicy(Enum):
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full = 0
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@ -1 +1 @@
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Subproject commit 2f911d1117d2220d85c76bbd293a58bd291c63e1
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Subproject commit 8e0855c0671e38cbf74f768e18f8b75d16752eb8
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