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11b7f081f1
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53 Commits

Author SHA1 Message Date
Piotr Debski
11b7f081f1 Fix for test test_interrupt_core_remove 
Signed-off-by: Piotr Debski <piotr.debski@intel.com>
 2022-08-01 13:54:21 +02:00
Michal Mielewczyk
c13dd5bc88 tests: improve standby fault injection tests 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-07-25 13:00:35 +02:00
Robert Baldyga
c899abe1b3 Add missing license headers 
Signed-off-by: Robert Baldyga <robert.baldyga@intel.com>
 2022-07-22 09:17:16 +02:00
Krzysztof Majzerowicz-Jaszcz
fce070cace Fix for tests using get_metadata_size() 
Since OCF has changed how metadata size is reported (OCF PR #744),
get_metadata_size() became get_metadata_size_on_device() and tests
using it are changed accordingly.

OCF version with required changes included in this commit

Signed-off-by: Krzysztof Majzerowicz-Jaszcz <krzysztof.majzerowicz-jaszcz@intel.com>
 2022-07-07 09:37:49 +02:00
Krzysztof Majzerowicz-Jaszcz
09d36d5e11 API fix for casadm standby init 
Cache line size parameter is handled inconsistently in standby init and
start cache methods.

This patch fixes this inconsistency so both methods accept a proper
CacheLineSize object.

Some of the existing tests needed fixing as well, as included in this
patch.

Signed-off-by: Krzysztof Majzerowicz-Jaszcz <krzysztof.majzerowicz-jaszcz@intel.com>
 2022-07-05 20:25:05 +02:00
pskwarlo
3ff56e77de Test for activating the same cache path 
Signed-off-by: Pawel Skwarlo <pawel.skwarlo@intel.com>
 2022-07-04 10:59:58 +02:00
Katarzyna Łapińska
685b68516a
Merge pull request #1202 from anikielx/test_parallel_core_flushing 
Add test_parallel_core_flushing
 2022-05-24 13:56:27 +02:00
Adriana Nikelska
7084137dcb Add test_parallel_core_flushing 
Signed-off-by: Adriana Nikelska <adrianax.nikielska@intel.com>
 2022-05-13 10:26:45 +02:00
Michal Mielewczyk
00b3464644 tests: test_activate_neg_core_size 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-25 15:11:05 +02:00
Michal Mielewczyk
150c20608c tests: test_activate_incomplete_cache 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-25 15:11:05 +02:00
Michal Mielewczyk
f05443c06b tests: more meaningful name for test_standby.py 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-25 11:18:18 +02:00
Karolina Rogowska
70834a74cd
Merge pull request #1184 from mmichal10/test-standby-neg-cache-id 
Test standby neg cache
 2022-04-21 12:33:48 +02:00
Michal Mielewczyk
251485b7b0 tests: add test_activate_neg_cache_id 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-21 07:53:09 +02:00
Michal Mielewczyk
ca1da2510a tests: add test_activate_corrupted_after_dump 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-20 08:45:17 +02:00
Michal Mielewczyk
5dd65bb64b tests: add test_load_corrupted 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-20 08:45:17 +02:00
Michal Mielewczyk
ab99c08504 tests: add test_activate_corrupted 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-04-20 08:45:17 +02:00
Karolina Rogowska
6f4398cdea
Merge pull request #1066 from Deixx/insert-error 
Fix insert error tests
 2022-03-02 12:50:58 +01:00
Michal Mielewczyk
2f5afff8f2 tests: allow the flushing thread to flush 
Signed-off-by: Michal Mielewczyk <michal.mielewczyk@intel.com>
 2022-02-18 12:28:53 +01:00
Daniel Madej
e18946d1b9 Fix insert error tests 
Signed-off-by: Daniel Madej <daniel.madej@intel.com>
 2022-02-17 16:36:34 +01:00
Slawomir Jankowski
0b299b7d96 Fix interruption tests 
Add helper functions and use them in interruption tests.
Fix tests descriptions and messages.
Update test according to current behaviour of cache mode switching.

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2021-11-08 11:27:45 +01:00
Rafal Stefanowski
acec05060d Fix license 
Change license to BSD-3-Clause

Signed-off-by: Rafal Stefanowski <rafal.stefanowski@intel.com>
 2021-10-28 12:46:42 +02:00
Karolina Rogowska
ec9a7ca19c update cli messages and tests accordingly 
Signed-off-by: Karolina Rogowska <karolina.rogowska@intel.com>
 2021-08-05 15:49:27 +02:00
Karolina Rogowska
4a274ff010 longer io in test_soft_hot_plug_device 
Fix for problem: io ended before core disappeared from the system after unplug so then were no errors counted/detected.

Signed-off-by: Karolina Rogowska <karolina.rogowska@intel.com>
 2021-04-01 14:45:20 +02:00
Katarzyna Łapińska
3685a926b4
Merge pull request #577 from karolinavelkaja/fault_power_hit_test 
Adding test 'test_fault_power_hit' and cli messages accordingly
 2021-01-25 13:50:28 +01:00
Rafal Stefanowski
43f43068ad Update copyright statements (2021) 
Signed-off-by: Rafal Stefanowski <rafal.stefanowski@intel.com>
 2021-01-21 13:15:38 +01:00
Karolina Rogowska
aa08a82669 Adding test 'test_fault_power_hit' and cli messages accordingly 
Signed-off-by: Karolina Rogowska <karolina.rogowska@intel.com>
 2021-01-14 13:10:50 +01:00
Robert Baldyga
22b4288f3d tests: Update tests after test-framework API changes 
Signed-off-by: Robert Baldyga <robert.baldyga@intel.com>
 2021-01-05 20:35:58 +01:00
Slawomir Jankowski
17f440de10 Update TF and functional tests API 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
Signed-off-by: Robert Baldyga <robert.baldyga@intel.com>
 2020-12-22 16:29:33 +01:00
Karolina Rogowska
96a6fa6ba1 adding new test 'test_fault_power_hit_init' 
Signed-off-by: Karolina Rogowska <karolina.rogowsky@gmail.com>
Signed-off-by: Karolina Rogowska <karolina.rogowska@intel.com>
 2020-12-16 15:25:39 +01:00
Jan Musial
31fda78be4 Use parametrizex in tests 
Signed-off-by: Jan Musial <jan.musial@intel.com>
 2020-08-11 13:05:15 +02:00
Robert Baldyga
1e25420f86
Merge pull request #404 from rafalste/copyright_update 
Update copyright statements
 2020-05-19 11:25:11 +02:00
Rafal Stefanowski
44b4020cc1 Update copyright statements 
Signed-off-by: Rafal Stefanowski <rafal.stefanowski@intel.com>
 2020-05-04 16:47:38 +02:00
Daniel Madej
f31587fc9d Refactor check_msg + fixes in touched files 
Signed-off-by: Daniel Madej <daniel.madej@intel.com>
 2020-04-29 11:55:08 +02:00
Katarzyna Lapinska
1cf56d9d6c Tests directories cleanup 2020-04-27 15:24:01 +02:00
Michał Mielewczyk
6e1224191f
Merge pull request #260 from Ostrokrzew/many2one 
Add FI many to one tests
 2020-02-18 09:00:05 +01:00
Katarzyna Łapińska
49edc8a8cd
Merge pull request #315 from Ostrokrzew/interrupt 
Interruption tests
 2020-02-18 07:24:43 +01:00
Slawomir Jankowski
17528aefdd Add interrupt cache stop interrupt test 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 15:36:31 +01:00
Slawomir Jankowski
657023a79c Add two tests for interrupting cache mode switch 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 15:36:31 +01:00
Slawomir Jankowski
5f21f4d580 Add interrupt removing core test 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 15:36:31 +01:00
Slawomir Jankowski
90c27e488c Add Interrupt cache flushing test 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 15:36:31 +01:00
Slawomir Jankowski
660a99ae5c Add Interrupt core flushing test 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 15:36:31 +01:00
Slawomir Jankowski
8c7f0dcd32 One of many cores in cache fails 
OpenCAS continue to work after one of many cores fails
1. Start cache.
2. Add core1 to previously created cache.
3. Add core2 to previously created cache.
4. Fill cache with pages from core1.
5. Fail core1.
6. Check if core2 is able to use cache.

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-17 09:44:55 +01:00
Slawomir Jankowski
4717b942d9 Dynamic allocation of space in cache 
OpenCAS continues to operate after one of many cores is released:
1. "Start cache",
2. "Add core1 to previously created cache",
3. "Add core2 to previously created cache",
4. "Fill cache with pages from core1",
5. "Check if core2 is able to use cache"

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-14 14:50:29 +01:00
Slawomir Jankowski
9ad35e8ae9 Remove one of multiple cores from cache 
OpenCAS continues to operate after one of many cores is removed:
1. "Start cache",
2. "Add core1 to previously created cache",
3. "Add core2 to previously created cache",
4. "Fill cache with pages from core1",
5. "Remove core1",
6. "Check if core2 is able to use cache"

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-14 14:50:29 +01:00
Slawomir Jankowski
8991153bd8 Remove core from multilevel cache 
OpenCAS not allow remove the core on 1 level cache when is used by level 2:
/1/ "Create multilevel intelcas device",
/2/ "Try to remove intelcas device on level 1",
/3/ "Remove intelcas device"

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-13 15:54:32 +01:00
Slawomir Jankowski
f1749526fb Stop cache '--no-data-flush' without fs on core 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-12 13:06:36 +01:00
Slawomir Jankowski
232b6ef21c Stop cache '--no-data-flush' with fs on core 
Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-02-12 13:06:19 +01:00
Slawomir_Jankowski
5d78207f27 Update FI test: try add twice the same device as core 
Check that OpenCAS does not accepts twice the same device as core.
Update code in file.

Signed-off-by: Slawomir Jankowski <slawomir.jankowski@intel.com>
 2020-01-31 15:02:42 +01:00
Sławomir Jankowski
0fb4d76e35
Merge pull request #279 from katlapinka/groups_cleanup 
Cleanup test groups directories (fault injection and cache ops)
 2020-01-16 10:36:58 +01:00
Katarzyna Lapinska
3cf0cf2642 Cleanup test groups (fault injection and cache ops) 2020-01-16 09:52:30 +01:00