From 027b1a4c468dd0ca2f75d3bf96cacdfdb40f56b4 Mon Sep 17 00:00:00 2001 From: Wei Liu Date: Wed, 10 Jun 2026 07:55:33 -0700 Subject: [PATCH] tests: enable MSHV fw_cfg coverage Re-enable the fw_cfg integration tests for MSHV now that port string I/O is handled by the hypervisor backend. Signed-off-by: Wei Liu Assisted-by: Copilot:GPT-5.5 --- cloud-hypervisor/tests/integration.rs | 2 -- hypervisor/src/mshv/x86_64/io_port.rs | 20 ++++++++++++-------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/cloud-hypervisor/tests/integration.rs b/cloud-hypervisor/tests/integration.rs index 458a570bf..97f1afbd4 100644 --- a/cloud-hypervisor/tests/integration.rs +++ b/cloud-hypervisor/tests/integration.rs @@ -12004,7 +12004,6 @@ mod fw_cfg { use crate::*; #[test] - #[cfg_attr(feature = "mshv", ignore = "See #7434")] fn test_fw_cfg() { let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string()); let guest = Guest::new(Box::new(disk_config)); @@ -12052,7 +12051,6 @@ mod fw_cfg { } #[test] - #[cfg_attr(feature = "mshv", ignore = "See #7434")] fn test_fw_cfg_string() { let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string()); let guest = Guest::new(Box::new(disk_config)); diff --git a/hypervisor/src/mshv/x86_64/io_port.rs b/hypervisor/src/mshv/x86_64/io_port.rs index d5bae8e06..c590dbcb0 100644 --- a/hypervisor/src/mshv/x86_64/io_port.rs +++ b/hypervisor/src/mshv/x86_64/io_port.rs @@ -296,7 +296,7 @@ impl MshvVcpu { #[cfg(test)] mod tests { - use mshv_bindings::hv_x64_io_port_access_info; + use mshv_bindings::{hv_x64_intercept_message_header, hv_x64_io_port_access_info}; use super::*; @@ -319,11 +319,15 @@ mod tests { .set_rep_prefix(rep_prefix as u8); } - let mut info = hv_x64_io_port_intercept_message::default(); - info.access_info = access_info; - info.header.intercept_access_type = access_type; - info.rcx = rcx; - info + hv_x64_io_port_intercept_message { + header: hv_x64_intercept_message_header { + intercept_access_type: access_type, + ..Default::default() + }, + access_info, + rcx, + ..Default::default() + } } #[test] @@ -341,7 +345,7 @@ mod tests { let bad_size = io_port_info(3, false, false, HV_INTERCEPT_ACCESS_READ as u8, 0); let bad_access = io_port_info(1, false, false, 0xff, 0); - assert!(MshvVcpu::io_port_access_len(&bad_size).is_err()); - assert!(MshvVcpu::io_port_is_write(&bad_access).is_err()); + MshvVcpu::io_port_access_len(&bad_size).unwrap_err(); + MshvVcpu::io_port_is_write(&bad_access).unwrap_err(); } }