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https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2026-08-05 02:19:16 +00:00
vmm: Use new Resource type PciBar
Instead of defining some very generic resources as PioAddressRange or MmioAddressRange for each PCI BAR, let's move to the new Resource type PciBar in order to make things clearer. This allows the code for being more readable, but also removes the need for hard assumptions about the MMIO and PIO ranges. PioAddressRange and MmioAddressRange types can be used to describe everything except PCI BARs. BARs are very special as they can be relocated and have special information we want to carry along with them. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
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@@ -9,6 +9,7 @@ use std::fmt::{self, Display};
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use std::sync::{Arc, Mutex};
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use versionize::{VersionMap, Versionize, VersionizeError, VersionizeResult};
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use versionize_derive::Versionize;
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use vm_device::PciBarType;
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use vm_migration::{MigratableError, Pausable, Snapshot, Snapshottable, VersionMapped};
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// The number of 32bit registers in the config space, 4096 bytes.
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@@ -327,12 +328,43 @@ pub enum PciBarRegionType {
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Memory64BitRegion = 0x04,
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}
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impl From<PciBarType> for PciBarRegionType {
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fn from(type_: PciBarType) -> Self {
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match type_ {
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PciBarType::Io => PciBarRegionType::IoRegion,
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PciBarType::Mmio32 => PciBarRegionType::Memory32BitRegion,
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PciBarType::Mmio64 => PciBarRegionType::Memory64BitRegion,
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}
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}
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}
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#[allow(clippy::from_over_into)]
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impl Into<PciBarType> for PciBarRegionType {
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fn into(self) -> PciBarType {
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match self {
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PciBarRegionType::IoRegion => PciBarType::Io,
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PciBarRegionType::Memory32BitRegion => PciBarType::Mmio32,
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PciBarRegionType::Memory64BitRegion => PciBarType::Mmio64,
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}
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}
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}
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#[derive(Copy, Clone)]
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pub enum PciBarPrefetchable {
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NotPrefetchable = 0,
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Prefetchable = 0x08,
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}
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#[allow(clippy::from_over_into)]
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impl Into<bool> for PciBarPrefetchable {
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fn into(self) -> bool {
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match self {
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PciBarPrefetchable::NotPrefetchable => false,
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PciBarPrefetchable::Prefetchable => true,
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}
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}
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}
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#[derive(Copy, Clone)]
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pub struct PciBarConfiguration {
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addr: u64,
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@@ -982,6 +1014,10 @@ impl PciBarConfiguration {
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pub fn region_type(&self) -> PciBarRegionType {
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self.region_type
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}
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pub fn prefetchable(&self) -> PciBarPrefetchable {
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self.prefetchable
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}
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}
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#[cfg(test)]
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+2
-5
@@ -19,10 +19,8 @@ pub enum Error {
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IoAllocationFailed(u64),
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/// Registering an IO BAR failed.
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IoRegistrationFailed(u64, configuration::Error),
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/// Not enough resources
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/// Expected resource not found.
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MissingResource,
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/// Invalid type of resource
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InvalidResourceType,
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}
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pub type Result<T> = std::result::Result<T, Error>;
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@@ -38,8 +36,7 @@ impl Display for Error {
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IoRegistrationFailed(addr, e) => {
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write!(f, "failed to register an IO BAR, addr={} err={}", addr, e)
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}
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MissingResource => write!(f, "Missing resource"),
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InvalidResourceType => write!(f, "Invalid type of resource"),
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MissingResource => write!(f, "failed to find expected resource"),
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}
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}
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}
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+10
-11
@@ -376,18 +376,17 @@ impl VfioCommon {
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let region_size: u64;
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let bar_addr: GuestAddress;
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let restored_bar_addr = if let Some(resources) = &resources {
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match resources
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.get(bars.len())
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.ok_or(PciDeviceError::MissingResource)?
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{
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Resource::MmioAddressRange { base, .. } => Some(GuestAddress(*base)),
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Resource::PioAddressRange { base, .. } => Some(GuestAddress(*base as u64)),
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_ => return Err(PciDeviceError::InvalidResourceType),
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let mut restored_bar_addr = None;
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if let Some(resources) = &resources {
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for resource in resources {
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if let Resource::PciBar { index, base, .. } = resource {
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if *index == bar_id as usize {
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restored_bar_addr = Some(GuestAddress(*base));
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break;
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}
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}
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}
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} else {
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None
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};
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}
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let bar_offset = if bar_id == VFIO_PCI_ROM_REGION_INDEX {
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(PCI_ROM_EXP_BAR_INDEX * 4) as u32
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