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pci: Allow for registering IO and Memory BAR

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This patch adds the support for both IO and Memory BARs by expecting
the function allocate_bars() to identify the type of each BAR.
Based on the type, register_mapping() insert the address range on the
appropriate bus (PIO or MMIO).

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
This commit is contained in:
Sebastien Boeuf
2019-07-19 10:50:30 -07:00
parent b157181656
commit 1268165040
4 changed files with 62 additions and 23 deletions
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27
pci/src/bus.rs
View File

@@ -2,7 +2,9 @@
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE-BSD-3-Clause file.
use crate::configuration::{PciBridgeSubclass, PciClassCode, PciConfiguration, PciHeaderType};
use crate::configuration::{
PciBarRegionType, PciBridgeSubclass, PciClassCode, PciConfiguration, PciHeaderType,
};
use crate::device::{Error as PciDeviceError, PciDevice};
use byteorder::{ByteOrder, LittleEndian};
use devices::BusDevice;
@@ -21,6 +23,8 @@ pub enum PciRootError {
AllocateDeviceAddrs(PciDeviceError),
/// Could not allocate an IRQ number.
AllocateIrq,
/// Could not add a device to the port io bus.
PioInsert(devices::BusError),
/// Could not add a device to the mmio bus.
MmioInsert(devices::BusError),
}
@@ -89,12 +93,23 @@ impl PciConfigIo {
pub fn register_mapping(
&self,
dev: Arc<Mutex<dyn BusDevice>>,
bus: &mut devices::Bus,
bars: Vec<(GuestAddress, GuestUsize)>,
io_bus: &mut devices::Bus,
mmio_bus: &mut devices::Bus,
bars: Vec<(GuestAddress, GuestUsize, PciBarRegionType)>,
) -> Result<()> {
for (address, size) in bars {
bus.insert(dev.clone(), address.raw_value(), size)
.map_err(PciRootError::MmioInsert)?;
for (address, size, type_) in bars {
match type_ {
PciBarRegionType::IORegion => {
io_bus
.insert(dev.clone(), address.raw_value(), size)
.map_err(PciRootError::PioInsert)?;
}
PciBarRegionType::Memory32BitRegion | PciBarRegionType::Memory64BitRegion => {
mmio_bus
.insert(dev.clone(), address.raw_value(), size)
.map_err(PciRootError::MmioInsert)?;
}
}
}
Ok(())
}

4
pci/src/device.rs
View File

@@ -2,7 +2,7 @@
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE-BSD-3-Clause file.
use crate::configuration;
use crate::configuration::{self, PciBarRegionType};
use crate::msix::MsixTableEntry;
use crate::PciInterruptPin;
use devices::BusDevice;
@@ -66,7 +66,7 @@ pub trait PciDevice: BusDevice {
fn allocate_bars(
&mut self,
_allocator: &mut SystemAllocator,
) -> Result<Vec<(GuestAddress, GuestUsize)>> {
) -> Result<Vec<(GuestAddress, GuestUsize, PciBarRegionType)>> {
Ok(Vec::new())
}