vmm: retrieve timebase-frequency from KVM instead of hardcoding

The RISC-V device tree's timebase-frequency was hardcoded to 10 MHz
(0x989680). Actual hardware uses different frequencies.

Read the timebase frequency from KVM_GET_ONE_REG via
KVM_REG_RISCV_TIMER (offset 0, kvm_riscv_timer.frequency),
thread it through the VMM to arch to FDT layers, and fall back to
the 10 MHz default when KVM returns no value.

Signed-off-by: Meng Zhuo <mengzhuo@iscas.ac.cn>

hypervisor/src/cpu.rs

@@ -516,6 +516,14 @@ pub trait Vcpu: Send + Sync {
     #[cfg(target_arch = "riscv64")]
     fn get_non_core_reg(&self, non_core_reg: u32) -> Result<u64>;
     ///
+    /// Get the timebase frequency (timer frequency in Hz) on RISC-V 64-bit.
+    /// This is the frequency at which the RISC-V `time` CSR increments.
+    ///
+    #[cfg(target_arch = "riscv64")]
+    fn get_timebase_frequency(&self) -> Result<u64> {
+        Ok(0)
+    }
+    ///
     /// Configure core registers for a given CPU.
     ///
     #[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]