diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs
index 3d0ef901b..c7ba6bbb2 100644
--- a/hypervisor/src/kvm/mod.rs
+++ b/hypervisor/src/kvm/mod.rs
@@ -1727,335 +1727,39 @@ impl cpu::Vcpu for KvmVcpu {
             };
         }
 
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, pc);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.pc.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, ra);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.ra.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, sp);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.sp.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, gp);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.gp.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, tp);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.tp.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t0);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t0.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t1);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t1.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t2);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t2.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s0);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s0.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s1);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s1.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a0);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a0.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a1);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a1.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a2);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a2.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a3);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a3.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a4);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a4.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a5);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a5.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a6);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a6.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, a7);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.a7.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s2);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s2.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s3);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s3.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s4);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s4.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s5);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s5.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s6);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s6.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s7);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s7.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s8);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s8.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s9);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s9.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s10);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s10.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, s11);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.s11.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t3);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t3.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t4);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t4.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t5);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t5.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, t6);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.regs.t6.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
-
-        let off = offset_of!(kvm_riscv_core, mode);
-        self.fd
-            .lock()
-            .unwrap()
-            .set_one_reg(
-                riscv64_reg_id!(KVM_REG_RISCV_CORE, off),
-                &kvm_regs_state.mode.to_le_bytes(),
-            )
-            .map_err(|e| cpu::HypervisorCpuError::SetRiscvCoreRegister(e.into()))?;
+        riscv64_set_one_reg_to_vcpu!(pc);
+        riscv64_set_one_reg_to_vcpu!(ra);
+        riscv64_set_one_reg_to_vcpu!(sp);
+        riscv64_set_one_reg_to_vcpu!(gp);
+        riscv64_set_one_reg_to_vcpu!(tp);
+        riscv64_set_one_reg_to_vcpu!(t0);
+        riscv64_set_one_reg_to_vcpu!(t1);
+        riscv64_set_one_reg_to_vcpu!(t2);
+        riscv64_set_one_reg_to_vcpu!(s0);
+        riscv64_set_one_reg_to_vcpu!(s1);
+        riscv64_set_one_reg_to_vcpu!(a0);
+        riscv64_set_one_reg_to_vcpu!(a1);
+        riscv64_set_one_reg_to_vcpu!(a2);
+        riscv64_set_one_reg_to_vcpu!(a3);
+        riscv64_set_one_reg_to_vcpu!(a4);
+        riscv64_set_one_reg_to_vcpu!(a5);
+        riscv64_set_one_reg_to_vcpu!(a6);
+        riscv64_set_one_reg_to_vcpu!(a7);
+        riscv64_set_one_reg_to_vcpu!(s2);
+        riscv64_set_one_reg_to_vcpu!(s3);
+        riscv64_set_one_reg_to_vcpu!(s4);
+        riscv64_set_one_reg_to_vcpu!(s5);
+        riscv64_set_one_reg_to_vcpu!(s6);
+        riscv64_set_one_reg_to_vcpu!(s7);
+        riscv64_set_one_reg_to_vcpu!(s8);
+        riscv64_set_one_reg_to_vcpu!(s9);
+        riscv64_set_one_reg_to_vcpu!(s10);
+        riscv64_set_one_reg_to_vcpu!(s11);
+        riscv64_set_one_reg_to_vcpu!(t3);
+        riscv64_set_one_reg_to_vcpu!(t4);
+        riscv64_set_one_reg_to_vcpu!(t5);
+        riscv64_set_one_reg_to_vcpu!(t6);
+        riscv64_set_one_reg_to_vcpu!(mode);
 
         Ok(())
     }