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build: Fix beta clippy issue (derive_partial_eq_without_eq)

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warning: you are deriving `PartialEq` and can implement `Eq`
  --> vmm/src/serial_manager.rs:59:30
   |
59 | #[derive(Debug, Clone, Copy, PartialEq)]
   |                              ^^^^^^^^^ help: consider deriving `Eq` as well: `PartialEq, Eq`
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#derive_partial_eq_without_eq

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
2022-06-30 16:41:46 +01:00
parent 9cf0dee264
commit 2716bc3311
20 changed files with 54 additions and 54 deletions
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4
pci/src/configuration.rs
View File

@@ -187,7 +187,7 @@ pub trait PciProgrammingInterface {
}
/// Types of PCI capabilities.
#[derive(PartialEq, Copy, Clone)]
#[derive(PartialEq, Eq, Copy, Clone)]
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[repr(C)]
@@ -321,7 +321,7 @@ pub struct PciConfiguration {
}
/// See pci_regs.h in kernel
#[derive(Copy, Clone, PartialEq, Versionize, Debug)]
#[derive(Copy, Clone, PartialEq, Eq, Versionize, Debug)]
pub enum PciBarRegionType {
Memory32BitRegion = 0,
IoRegion = 0x01,

2
pci/src/lib.rs
View File

@@ -52,7 +52,7 @@ pub const PCI_CONFIG_IO_PORT: u64 = 0xcf8;
#[cfg(target_arch = "x86_64")]
pub const PCI_CONFIG_IO_PORT_SIZE: u64 = 0x8;
#[derive(Clone, Copy, PartialEq, PartialOrd)]
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd)]
pub struct PciBdf(u32);
struct PciBdfVisitor;