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hypervisor: Add GICv2M support for MSHV ARM64 guest
MSHV does not emulate a GICv3-ITS for guests to support MSI interrupts, instead it exposes a GICv2m device. Currently adding a skeleton code which would be modified later on with complete implementation. With this we can start compiling cloud-hypervisor for MSHV on ARM64. This will make sure that we don't regress in future in terms of basic compilation test. Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
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@@ -43,6 +43,8 @@ pub struct VgicConfig {
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pub enum GicState {
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#[cfg(feature = "kvm")]
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Kvm(crate::kvm::aarch64::gic::Gicv3ItsState),
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#[cfg(feature = "mshv")]
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MshvGicV2M(crate::mshv::aarch64::gic::MshvGicV2MState),
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}
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impl<'de> Deserialize<'de> for GicState {
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@@ -56,6 +58,8 @@ impl<'de> Deserialize<'de> for GicState {
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pub enum GicStateDefaultDeserialize {
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#[cfg(feature = "kvm")]
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Kvm(crate::kvm::aarch64::gic::Gicv3ItsState),
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#[cfg(feature = "mshv")]
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MshvGicV2M(crate::mshv::aarch64::gic::MshvGicV2MState),
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}
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const {
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@@ -78,6 +82,8 @@ impl<'de> Deserialize<'de> for GicState {
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return match gic_state_de {
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#[cfg(feature = "kvm")]
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GicStateDefaultDeserialize::Kvm(state) => Ok(GicState::Kvm(state)),
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#[cfg(feature = "mshv")]
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GicStateDefaultDeserialize::MshvGicV2M(state) => Ok(GicState::MshvGicV2M(state)),
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};
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}
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Err(SerdeError::custom("Failed to deserialize GicState"))
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