hypervisor: Add GICv2M support for MSHV ARM64 guest

MSHV does not emulate a GICv3-ITS for guests to support MSI interrupts,
instead it exposes a GICv2m device. Currently adding a skeleton code
which would be modified later on with complete implementation.

With this we can start compiling cloud-hypervisor for MSHV on ARM64.
This will make sure that we don't regress in future in terms of basic
compilation test.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor/src/kvm/aarch64/gic/mod.rs

@@ -129,6 +129,9 @@ impl From<GicState> for Gicv3ItsState {
     fn from(state: GicState) -> Self {
         match state {
             GicState::Kvm(state) => state,
+            /* Needed in case other hypervisors are enabled */
+            #[allow(unreachable_patterns)]
+            _ => panic!("GicState is not valid"),
         }
     }
 }