diff --git a/arch/src/aarch64/fdt.rs b/arch/src/aarch64/fdt.rs
index 4bc9c5709..094deba37 100644
--- a/arch/src/aarch64/fdt.rs
+++ b/arch/src/aarch64/fdt.rs
@@ -259,7 +259,7 @@ fn create_memory_node(
         if last_addr < super::layout::MEM_32BIT_RESERVED_START.raw_value() {
             // Case 1: all RAM is under the hole
             let mem_size = last_addr - super::layout::RAM_START.raw_value() + 1;
-            let mem_reg_prop = [super::layout::RAM_START.raw_value() as u64, mem_size as u64];
+            let mem_reg_prop = [super::layout::RAM_START.raw_value(), mem_size];
             let memory_node = fdt.begin_node("memory")?;
             fdt.property_string("device_type", "memory")?;
             fdt.property_array_u64("reg", &mem_reg_prop)?;
@@ -269,7 +269,7 @@ fn create_memory_node(
             // Region 1: RAM before the hole
             let mem_size = super::layout::MEM_32BIT_RESERVED_START.raw_value()
                 - super::layout::RAM_START.raw_value();
-            let mem_reg_prop = [super::layout::RAM_START.raw_value() as u64, mem_size as u64];
+            let mem_reg_prop = [super::layout::RAM_START.raw_value(), mem_size];
             let memory_node_name = format!("memory@{:x}", super::layout::RAM_START.raw_value());
             let memory_node = fdt.begin_node(&memory_node_name)?;
             fdt.property_string("device_type", "memory")?;
@@ -278,10 +278,7 @@ fn create_memory_node(
 
             // Region 2: RAM after the hole
             let mem_size = last_addr - super::layout::RAM_64BIT_START.raw_value() + 1;
-            let mem_reg_prop = [
-                super::layout::RAM_64BIT_START.raw_value() as u64,
-                mem_size as u64,
-            ];
+            let mem_reg_prop = [super::layout::RAM_64BIT_START.raw_value(), mem_size];
             let memory_node_name =
                 format!("memory@{:x}", super::layout::RAM_64BIT_START.raw_value());
             let memory_node = fdt.begin_node(&memory_node_name)?;
@@ -303,7 +300,7 @@ fn create_chosen_node(
     fdt.property_string("bootargs", cmdline)?;
 
     if let Some(initrd_config) = initrd {
-        let initrd_start = initrd_config.address.raw_value() as u64;
+        let initrd_start = initrd_config.address.raw_value();
         let initrd_end = initrd_config.address.raw_value() + initrd_config.size as u64;
         fdt.property_u64("linux,initrd-start", initrd_start)?;
         fdt.property_u64("linux,initrd-end", initrd_end)?;
diff --git a/arch/src/aarch64/mod.rs b/arch/src/aarch64/mod.rs
index f160f986a..93ea987a0 100644
--- a/arch/src/aarch64/mod.rs
+++ b/arch/src/aarch64/mod.rs
@@ -108,7 +108,7 @@ pub fn arch_memory_regions(size: GuestUsize) -> Vec<(GuestAddress, usize, Region
 
     // RAM space
     // Case1: guest memory fits before the gap
-    if size as u64 <= ram_32bit_space_size {
+    if size <= ram_32bit_space_size {
         regions.push((layout::RAM_START, size as usize, RegionType::Ram));
     // Case2: guest memory extends beyond the gap
     } else {
@@ -231,7 +231,7 @@ mod tests {
             layout::MEM_32BIT_RESERVED_START.unchecked_offset_from(layout::RAM_START) as usize;
         assert_eq!(6, regions.len());
         assert_eq!(layout::RAM_START, regions[3].0);
-        assert_eq!(ram_32bit_space_size as usize, regions[3].1);
+        assert_eq!(ram_32bit_space_size, regions[3].1);
         assert_eq!(RegionType::Ram, regions[3].2);
         assert_eq!(RegionType::Reserved, regions[5].2);
         assert_eq!(RegionType::Ram, regions[4].2);
diff --git a/devices/src/legacy/gpio_pl061.rs b/devices/src/legacy/gpio_pl061.rs
index a40157510..9bbdbc545 100644
--- a/devices/src/legacy/gpio_pl061.rs
+++ b/devices/src/legacy/gpio_pl061.rs
@@ -162,7 +162,7 @@ impl Gpio {
         //  Missing Output Interrupt Emulation.
 
         // Input Edging Interrupt Emulation.
-        let changed = ((self.old_in_data ^ self.data) & !self.dir) as u32;
+        let changed = (self.old_in_data ^ self.data) & !self.dir;
         if changed > 0 {
             self.old_in_data = self.data;
             for i in 0..N_GPIOS {
diff --git a/devices/src/legacy/uart_pl011.rs b/devices/src/legacy/uart_pl011.rs
index 7e4dbb9af..86fbdd249 100644
--- a/devices/src/legacy/uart_pl011.rs
+++ b/devices/src/legacy/uart_pl011.rs
@@ -533,10 +533,10 @@ mod tests {
             None,
         );
 
-        pl011.write(0, UARTDR as u64, &[b'x', b'y']);
-        pl011.write(0, UARTDR as u64, &[b'a']);
-        pl011.write(0, UARTDR as u64, &[b'b']);
-        pl011.write(0, UARTDR as u64, &[b'c']);
+        pl011.write(0, UARTDR, &[b'x', b'y']);
+        pl011.write(0, UARTDR, &[b'a']);
+        pl011.write(0, UARTDR, &[b'b']);
+        pl011.write(0, UARTDR, &[b'c']);
         assert_eq!(
             pl011_out.buf.lock().unwrap().as_slice(),
             &[b'x', b'a', b'b', b'c']
@@ -563,11 +563,11 @@ mod tests {
         assert_eq!(intr_evt.read().unwrap(), 2);
 
         let mut data = [0u8];
-        pl011.read(0, UARTDR as u64, &mut data);
+        pl011.read(0, UARTDR, &mut data);
         assert_eq!(data[0], b'a');
-        pl011.read(0, UARTDR as u64, &mut data);
+        pl011.read(0, UARTDR, &mut data);
         assert_eq!(data[0], b'b');
-        pl011.read(0, UARTDR as u64, &mut data);
+        pl011.read(0, UARTDR, &mut data);
         assert_eq!(data[0], b'c');
     }
 }
diff --git a/hypervisor/src/kvm/aarch64/gic/redist_regs.rs b/hypervisor/src/kvm/aarch64/gic/redist_regs.rs
index e92e4d02b..81fe5678d 100644
--- a/hypervisor/src/kvm/aarch64/gic/redist_regs.rs
+++ b/hypervisor/src/kvm/aarch64/gic/redist_regs.rs
@@ -39,8 +39,8 @@ const GICR_ICFGR0: u32 = GICR_SGI_OFFSET + 0x0C00;
 const KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT: u32 = 32;
 const KVM_DEV_ARM_VGIC_V3_MPIDR_MASK: u64 = 0xffffffff << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT as u64;
 
-const KVM_ARM64_SYSREG_MPIDR_EL1: u64 = KVM_REG_ARM64 as u64
-    | KVM_REG_SIZE_U64 as u64
+const KVM_ARM64_SYSREG_MPIDR_EL1: u64 = KVM_REG_ARM64
+    | KVM_REG_SIZE_U64
     | KVM_REG_ARM64_SYSREG as u64
     | (((3_u64) << KVM_REG_ARM64_SYSREG_OP0_SHIFT) & KVM_REG_ARM64_SYSREG_OP0_MASK as u64)
     | (((5_u64) << KVM_REG_ARM64_SYSREG_OP2_SHIFT) & KVM_REG_ARM64_SYSREG_OP2_MASK as u64);
diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs
index 36d5ba138..25d01cabb 100644
--- a/hypervisor/src/kvm/mod.rs
+++ b/hypervisor/src/kvm/mod.rs
@@ -1700,8 +1700,8 @@ impl cpu::Vcpu for KvmVcpu {
         // it to the corresponding KVM ID, and call `KVM_GET_ONE_REG` API to
         // get the value of the system parameter.
         //
-        let id: u64 = KVM_REG_ARM64 as u64
-            | KVM_REG_SIZE_U64 as u64
+        let id: u64 = KVM_REG_ARM64
+            | KVM_REG_SIZE_U64
             | KVM_REG_ARM64_SYSREG as u64
             | ((((sys_reg) >> 5)
                 & (KVM_REG_ARM64_SYSREG_OP0_MASK
diff --git a/vmm/src/acpi.rs b/vmm/src/acpi.rs
index 5ae1fd1fb..2ab7e113f 100644
--- a/vmm/src/acpi.rs
+++ b/vmm/src/acpi.rs
@@ -382,19 +382,19 @@ fn create_gtdt_table() -> Sdt {
     // GTDT
     let mut gtdt = Sdt::new(*b"GTDT", 104, 2, *b"CLOUDH", *b"CHGTDT  ", 1);
     // Secure EL1 Timer GSIV
-    gtdt.write(48, (ARCH_TIMER_S_EL1_IRQ + 16) as u32);
+    gtdt.write(48, ARCH_TIMER_S_EL1_IRQ + 16);
     // Secure EL1 Timer Flags
     gtdt.write(52, irqflags);
     // Non-Secure EL1 Timer GSIV
-    gtdt.write(56, (ARCH_TIMER_NS_EL1_IRQ + 16) as u32);
+    gtdt.write(56, ARCH_TIMER_NS_EL1_IRQ + 16);
     // Non-Secure EL1 Timer Flags
-    gtdt.write(60, (irqflags | ACPI_GTDT_CAP_ALWAYS_ON) as u32);
+    gtdt.write(60, irqflags | ACPI_GTDT_CAP_ALWAYS_ON);
     // Virtual EL1 Timer GSIV
-    gtdt.write(64, (ARCH_TIMER_VIRT_IRQ + 16) as u32);
+    gtdt.write(64, ARCH_TIMER_VIRT_IRQ + 16);
     // Virtual EL1 Timer Flags
     gtdt.write(68, irqflags);
     // EL2 Timer GSIV
-    gtdt.write(72, (ARCH_TIMER_NS_EL2_IRQ + 16) as u32);
+    gtdt.write(72, ARCH_TIMER_NS_EL2_IRQ + 16);
     // EL2 Timer Flags
     gtdt.write(76, irqflags);
 
@@ -414,7 +414,7 @@ fn create_spcr_table(base_address: u64, gsi: u32) -> Sdt {
     // Interrupt Type: Bit[3] ARMH GIC interrupt
     spcr.write(52, (1 << 3) as u8);
     // Global System Interrupt used by the UART
-    spcr.write(54, (gsi as u32).to_le());
+    spcr.write(54, gsi.to_le());
     // Baud Rate: 3 = 9600
     spcr.write(58, 3u8);
     // Stop Bits: 1 Stop bit
@@ -522,7 +522,7 @@ fn create_iort_table(pci_segments: &[PciSegment]) -> Sdt {
     iort.write(40, (48u32).to_le());
 
     // ITS group node
-    iort.write(48, ACPI_IORT_NODE_ITS_GROUP as u8);
+    iort.write(48, ACPI_IORT_NODE_ITS_GROUP);
     // Length of the ITS group node in bytes
     iort.write(49, (24u16).to_le());
     // ITS counts
@@ -532,7 +532,7 @@ fn create_iort_table(pci_segments: &[PciSegment]) -> Sdt {
     for (i, segment) in pci_segments.iter().enumerate() {
         let node_offset: usize =
             ACPI_IORT_NODE_ROOT_COMPLEX_OFFSET + i * ACPI_IORT_NODE_ROOT_COMPLEX_SIZE;
-        iort.write(node_offset, ACPI_IORT_NODE_PCI_ROOT_COMPLEX as u8);
+        iort.write(node_offset, ACPI_IORT_NODE_PCI_ROOT_COMPLEX);
         // Length of the root complex node in bytes
         iort.write(
             node_offset + 1,
diff --git a/vmm/src/cpu.rs b/vmm/src/cpu.rs
index 68ddf19b3..5f9b548e9 100644
--- a/vmm/src/cpu.rs
+++ b/vmm/src/cpu.rs
@@ -2671,7 +2671,7 @@ mod tests {
         let offset = offset__of!(user_pt_regs, pc);
         let regid = arm64_core_reg_id!(KVM_REG_SIZE_U64, offset);
         assert!(!is_system_register(regid));
-        let regid = KVM_REG_ARM64 as u64 | KVM_REG_SIZE_U64 as u64 | KVM_REG_ARM64_SYSREG as u64;
+        let regid = KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM64_SYSREG as u64;
         assert!(is_system_register(regid));
     }
 
diff --git a/vmm/src/memory_manager.rs b/vmm/src/memory_manager.rs
index c3fd98578..6fbb7d026 100644
--- a/vmm/src/memory_manager.rs
+++ b/vmm/src/memory_manager.rs
@@ -854,7 +854,7 @@ impl MemoryManager {
         let uefi_mem_region = self.vm.make_user_memory_region(
             uefi_mem_slot,
             uefi_region.start_addr().raw_value(),
-            uefi_region.len() as u64,
+            uefi_region.len(),
             uefi_region.as_ptr() as u64,
             false,
             false,