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hypervisor, vm-device: Relocate InterruptSourceConfig
Move this enum from vm-device to hypervisor crate so that hypervisor crate does not gain an extra dependency. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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@@ -57,6 +57,7 @@
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//! * The virtual device backend requests the interrupt manager to create an interrupt group
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//! according to guest configuration information
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pub use hypervisor::vm::{InterruptSourceConfig, LegacyIrqSourceConfig, MsiIrqSourceConfig};
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use std::sync::Arc;
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use vmm_sys_util::eventfd::EventFd;
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@@ -66,39 +67,6 @@ pub type Result<T> = std::io::Result<T>;
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/// Data type to store an interrupt source identifier.
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pub type InterruptIndex = u32;
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/// Configuration data for legacy interrupts.
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///
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/// On x86 platforms, legacy interrupts means those interrupts routed through PICs or IOAPICs.
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#[derive(Copy, Clone, Debug)]
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pub struct LegacyIrqSourceConfig {
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pub irqchip: u32,
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pub pin: u32,
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}
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/// Configuration data for MSI/MSI-X interrupts.
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///
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/// On x86 platforms, these interrupts are vectors delivered directly to the LAPIC.
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#[derive(Copy, Clone, Debug, Default)]
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pub struct MsiIrqSourceConfig {
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/// High address to delivery message signaled interrupt.
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pub high_addr: u32,
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/// Low address to delivery message signaled interrupt.
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pub low_addr: u32,
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/// Data to write to delivery message signaled interrupt.
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pub data: u32,
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/// Unique ID of the device to delivery message signaled interrupt.
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pub devid: u32,
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}
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/// Configuration data for an interrupt source.
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#[derive(Copy, Clone, Debug)]
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pub enum InterruptSourceConfig {
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/// Configuration data for Legacy interrupts.
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LegacyIrq(LegacyIrqSourceConfig),
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/// Configuration data for PciMsi, PciMsix and generic MSI interrupts.
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MsiIrq(MsiIrqSourceConfig),
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}
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/// Configuration data for legacy, pin based interrupt groups.
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///
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/// A legacy interrupt group only takes one irq number as its configuration.
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