build: Bump acpi_tables version

Fix newly added deprecation for mispelling of cacheable.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
Rob Bradford
2023-09-07 13:02:03 +01:00
committed by Rob Bradford
parent 1b9ce69afa
commit 4548de194d
7 changed files with 12 additions and 11 deletions

View File

@@ -2019,7 +2019,7 @@ impl Aml for CpuManager {
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
acpi_address.0,
acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,

View File

@@ -4383,7 +4383,7 @@ impl Aml for DeviceManager {
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
self.acpi_address.0,
self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,

View File

@@ -2331,7 +2331,7 @@ impl Aml for MemoryMethods {
&aml::Name::new(
"MR64".into(),
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::Cacheable,
aml::AddressSpaceCacheable::Cacheable,
true,
0x0000_0000_0000_0000u64,
0xFFFF_FFFF_FFFF_FFFEu64,
@@ -2414,7 +2414,7 @@ impl Aml for MemoryManager {
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
acpi_address.0,
acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
@@ -2510,7 +2510,7 @@ impl Aml for MemoryManager {
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
min,
max,

View File

@@ -348,7 +348,7 @@ impl Aml for PciSegment {
#[cfg(target_arch = "x86_64")]
&aml::IO::new(0xcf8, 0xcf8, 1, 0x8),
&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
layout::MEM_32BIT_DEVICES_START.0 as u32,
(layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE - 1)
@@ -356,7 +356,7 @@ impl Aml for PciSegment {
None,
),
&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
self.start_of_device_area,
self.end_of_device_area,
@@ -379,7 +379,7 @@ impl Aml for PciSegment {
layout::PCI_MMIO_CONFIG_SIZE_PER_SEGMENT as u32,
),
&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCacheable::NotCacheable,
true,
self.start_of_device_area,
self.end_of_device_area,