vmm: support PCI I/O regions on all architectures

While non-Intel CPU architectures don't have a special concept of IO
address space, support for PCI I/O regions is still needed to be able
to handle PCI devices that use them.

With this change, I'm able to pass through an e1000e device from QEMU
to a cloud-hypervisor VM on aarch64 and use it in the cloud-hypervisor
guest.  Previously, it would hit the unimplemented!().

Signed-off-by: Alyssa Ross <hi@alyssa.is>
This commit is contained in:
Alyssa Ross
2024-12-13 12:55:33 +01:00
committed by Rob Bradford
parent dd8a5a7de8
commit 50bac1694f
6 changed files with 24 additions and 58 deletions
+1 -4
View File
@@ -125,19 +125,16 @@ impl PciBus {
pub fn register_mapping(
&self,
dev: Arc<dyn BusDeviceSync>,
#[cfg(target_arch = "x86_64")] io_bus: &Bus,
io_bus: &Bus,
mmio_bus: &Bus,
bars: Vec<PciBarConfiguration>,
) -> Result<()> {
for bar in bars {
match bar.region_type() {
PciBarRegionType::IoRegion => {
#[cfg(target_arch = "x86_64")]
io_bus
.insert(dev.clone(), bar.addr(), bar.size())
.map_err(PciRootError::PioInsert)?;
#[cfg(not(target_arch = "x86_64"))]
error!("I/O region is not supported");
}
PciBarRegionType::Memory32BitRegion | PciBarRegionType::Memory64BitRegion => {
mmio_bus
-7
View File
@@ -713,11 +713,7 @@ impl VfioCommon {
let bar_addr = match region_type {
PciBarRegionType::IoRegion => {
#[cfg(not(target_arch = "x86_64"))]
unimplemented!();
// The address needs to be 4 bytes aligned.
#[cfg(target_arch = "x86_64")]
allocator
.lock()
.unwrap()
@@ -795,10 +791,7 @@ impl VfioCommon {
for region in self.mmio_regions.iter() {
match region.type_ {
PciBarRegionType::IoRegion => {
#[cfg(target_arch = "x86_64")]
allocator.free_io_addresses(region.start, region.length);
#[cfg(not(target_arch = "x86_64"))]
error!("I/O region is not supported");
}
PciBarRegionType::Memory32BitRegion => {
mmio32_allocator.free(region.start, region.length);