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aarch64: Align the data types in layout

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Some addresses defined in `layout.rs` were of type `GuestAddress`, and
are `u64`. Now align the types of all the `*_START` definitions to
`GuestAddress`.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
This commit is contained in:
Michael Zhao
2022-04-05 17:05:24 +08:00
committed by Bo Chen
parent d10bfd5aa4
commit 656425a328
7 changed files with 31 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files
vmm/src/acpi.rs
+1 -1
View File
@@ -667,7 +667,7 @@ pub fn create_acpi_tables(
.clone()
.get(&(DeviceType::Serial, DeviceType::Serial.to_string()))
.is_some();
let serial_device_addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START;
let serial_device_addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START.raw_value();
let serial_device_irq = if is_serial_on {
device_manager
.lock()
vmm/src/cpu.rs
+4 -2
View File
@@ -1276,6 +1276,7 @@ impl CpuManager {
#[cfg(target_arch = "aarch64")]
{
use vm_memory::Address;
/* Notes:
* Ignore Local Interrupt Controller Address at byte offset 36 of MADT table.
*/
@@ -1323,7 +1324,7 @@ impl CpuManager {
length: 24,
reserved0: 0,
gic_id: 0,
base_address: arch::layout::MAPPED_IO_START - 0x0001_0000,
base_address: arch::layout::MAPPED_IO_START.raw_value() - 0x0001_0000,
global_irq_base: 0,
version: 3,
reserved1: [0; 3],
@@ -1332,7 +1333,8 @@ impl CpuManager {
// See 5.2.12.17 GIC Redistributor (GICR) Structure in ACPI spec.
let gicr_size: u32 = 0x0001_0000 * 2 * (self.config.boot_vcpus as u32);
let gicr_base: u64 = arch::layout::MAPPED_IO_START - 0x0001_0000 - gicr_size as u64;
let gicr_base: u64 =
arch::layout::MAPPED_IO_START.raw_value() - 0x0001_0000 - gicr_size as u64;
let gicr = GicR {
r#type: acpi::ACPI_APIC_GENERIC_REDISTRIBUTOR,
length: 16,
vmm/src/device_manager.rs
+5 -5
View File
@@ -1190,7 +1190,7 @@ impl DeviceManager {
#[cfg(target_arch = "aarch64")]
{
let vcpus = self.config.lock().unwrap().cpus.boot_vcpus;
let msi_start = arch::layout::GIC_V3_DIST_START
let msi_start = arch::layout::GIC_V3_DIST_START.raw_value()
- arch::layout::GIC_V3_REDIST_SIZE * (vcpus as u64)
- arch::layout::GIC_V3_ITS_SIZE;
let msi_end = msi_start + arch::layout::GIC_V3_ITS_SIZE - 1;
@@ -1539,7 +1539,7 @@ impl DeviceManager {
self.bus_devices
.push(Arc::clone(&rtc_device) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_RTC_MAPPED_IO_START);
let addr = arch::layout::LEGACY_RTC_MAPPED_IO_START;
self.address_manager
.mmio_bus
@@ -1579,7 +1579,7 @@ impl DeviceManager {
self.bus_devices
.push(Arc::clone(&gpio_device) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_GPIO_MAPPED_IO_START);
let addr = arch::layout::LEGACY_GPIO_MAPPED_IO_START;
self.address_manager
.mmio_bus
@@ -1685,7 +1685,7 @@ impl DeviceManager {
self.bus_devices
.push(Arc::clone(&serial) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_SERIAL_MAPPED_IO_START);
let addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START;
self.address_manager
.mmio_bus
@@ -4293,7 +4293,7 @@ impl Aml for DeviceManager {
#[cfg(target_arch = "aarch64")]
&aml::Memory32Fixed::new(
true,
arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32,
arch::layout::LEGACY_SERIAL_MAPPED_IO_START.raw_value() as u32,
MMIO_LEN as u32,
),
]),