diff --git a/arch/src/x86_64/cpu_profile/mod.rs b/arch/src/x86_64/cpu_profile/mod.rs index 61f969ba1..6c0ac6cf4 100644 --- a/arch/src/x86_64/cpu_profile/mod.rs +++ b/arch/src/x86_64/cpu_profile/mod.rs @@ -9,6 +9,7 @@ use hypervisor::arch::x86::CpuIdEntry; use crate::x86_64::cpu_profile::cpuid_adjustments::{ CpuidOutputRegisterAdjustments, CpuidProfileData, MissingCpuidEntriesError, }; +use crate::x86_64::cpu_profile::msr_adjustments::MsrProfileData; use crate::x86_64::{AMX_TILECFG_BIT, AMX_TILEDATA_BIT, CpuidReg}; /// Mask indicating availability of the AMX TILECFG state component @@ -64,6 +65,13 @@ impl CpuProfile { CpuProfile::Host => None, } } + + /// Obtain MSR adjustment data related to the given CPU profile. + fn msr_data(&self) -> Option { + match self { + CpuProfile::Host => None, + } + } } /// See [`CpuProfile::adjust_cpuid`](CpuProfile::adjust_cpuid) diff --git a/arch/src/x86_64/cpu_profile/msr_adjustments.rs b/arch/src/x86_64/cpu_profile/msr_adjustments.rs index 514435a60..8c00f518c 100644 --- a/arch/src/x86_64/cpu_profile/msr_adjustments.rs +++ b/arch/src/x86_64/cpu_profile/msr_adjustments.rs @@ -89,3 +89,19 @@ impl FeatureMsrAdjustment { } } } + +/// Data describing MSR adjustments related to a CPU profile. +#[derive(Debug, Clone, Serialize, Deserialize, Eq, PartialEq)] +pub struct MsrProfileData { + /// Describes feature MSR adjustments necessary to become compatible with + /// the desired target. + pub adjustments: Vec<(RegisterAddress, FeatureMsrAdjustment)>, + /// List of the MSRs that the CPU profile requires. + /// + /// When applying a CPU profile then the union of the sets of MSRs obtained + /// from `Hypervisor::get_feature_msrs` and `Hypervisor::get_msr_index_list` + /// must necessarily contain all MSRs listed here. Otherwise the host is + /// considered incompatible with the CPU profile. Exceptions are made for + /// missing Hyper-V MSRs when `kvm_hyperv=off`. + pub required_msrs: Vec, +}