From 6d6e290000877443e3bd2b08bd64329f472646e2 Mon Sep 17 00:00:00 2001 From: Rob Bradford Date: Fri, 27 Sep 2019 14:32:00 +0100 Subject: [PATCH] arch: Move APIC and IOAPIC addresses into layout Move the addresses used for the APIC and IOAPIC into our new memory layout module. Signed-off-by: Rob Bradford --- arch/src/x86_64/acpi.rs | 4 ++-- arch/src/x86_64/layout.rs | 6 ++++++ arch/src/x86_64/mptable.rs | 9 ++++----- 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/src/x86_64/acpi.rs b/arch/src/x86_64/acpi.rs index 1ff11db88..dc4168194 100644 --- a/arch/src/x86_64/acpi.rs +++ b/arch/src/x86_64/acpi.rs @@ -253,7 +253,7 @@ pub fn create_acpi_tables( // MADT let mut madt = SDT::new(*b"APIC", 44, 5, *b"CLOUDH", *b"CHMADT ", 1); - madt.write(36, super::mptable::APIC_DEFAULT_PHYS_BASE); + madt.write(36, layout::APIC_START); for cpu in 0..num_cpus { let lapic = LocalAPIC { @@ -270,7 +270,7 @@ pub fn create_acpi_tables( r#type: 1, length: 12, ioapic_id: 0, - apic_address: super::mptable::IO_APIC_DEFAULT_PHYS_BASE, + apic_address: layout::IOAPIC_START.0 as u32, gsi_base: 0, ..Default::default() }); diff --git a/arch/src/x86_64/layout.rs b/arch/src/x86_64/layout.rs index a5fbabe54..f436ae98f 100644 --- a/arch/src/x86_64/layout.rs +++ b/arch/src/x86_64/layout.rs @@ -61,6 +61,12 @@ pub const MEM_32BIT_RESERVED_SIZE: GuestUsize = (1024 << 20); pub const MEM_32BIT_DEVICES_START: GuestAddress = MEM_32BIT_RESERVED_START; pub const MEM_32BIT_DEVICES_SIZE: GuestUsize = (768 << 20); +// IOAPIC +pub const IOAPIC_START: GuestAddress = GuestAddress(0xfec0_0000); + +// APIC +pub const APIC_START: GuestAddress = GuestAddress(0xfee0_0000); + /// Address for the TSS setup. pub const KVM_TSS_ADDRESS: GuestAddress = GuestAddress(0xfffb_d000); diff --git a/arch/src/x86_64/mptable.rs b/arch/src/x86_64/mptable.rs index ea28b3488..226a777f0 100644 --- a/arch/src/x86_64/mptable.rs +++ b/arch/src/x86_64/mptable.rs @@ -13,7 +13,8 @@ use std::slice; use libc::c_char; use arch_gen::x86::mpspec; -use vm_memory::{Address, ByteValued, Bytes, GuestAddress, GuestMemory, GuestMemoryMmap}; +use layout::{APIC_START, IOAPIC_START}; +use vm_memory::{Address, GuestAddress, ByteValued, Bytes, GuestMemory, GuestMemoryMmap}; // This is a workaround to the Rust enforcement specifying that any implementation of a foreign // trait (in this case `ByteValued`) where: @@ -92,8 +93,6 @@ const MPC_SPEC: i8 = 4; const MPC_OEM: [c_char; 8] = char_array!(c_char; 'F', 'C', ' ', ' ', ' ', ' ', ' ', ' '); const MPC_PRODUCT_ID: [c_char; 12] = ['0' as c_char; 12]; const BUS_TYPE_ISA: [u8; 6] = char_array!(u8; 'I', 'S', 'A', ' ', ' ', ' '); -pub const IO_APIC_DEFAULT_PHYS_BASE: u32 = 0xfec00000; // source: linux/arch/x86/include/asm/apicdef.h -pub const APIC_DEFAULT_PHYS_BASE: u32 = 0xfee00000; // source: linux/arch/x86/include/asm/apicdef.h const APIC_VERSION: u8 = 0x14; const CPU_STEPPING: u32 = 0x600; const CPU_FEATURE_APIC: u32 = 0x200; @@ -208,7 +207,7 @@ pub fn setup_mptable(mem: &GuestMemoryMmap, num_cpus: u8) -> Result<()> { mpc_ioapic.0.apicid = ioapicid; mpc_ioapic.0.apicver = APIC_VERSION; mpc_ioapic.0.flags = mpspec::MPC_APIC_USABLE as u8; - mpc_ioapic.0.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; + mpc_ioapic.0.apicaddr = IOAPIC_START.0 as u32; mem.write_obj(mpc_ioapic, base_mp) .map_err(|_| Error::WriteMpcIoapic)?; base_mp = base_mp.unchecked_add(size as u64); @@ -271,7 +270,7 @@ pub fn setup_mptable(mem: &GuestMemoryMmap, num_cpus: u8) -> Result<()> { mpc_table.0.spec = MPC_SPEC; mpc_table.0.oem = MPC_OEM; mpc_table.0.productid = MPC_PRODUCT_ID; - mpc_table.0.lapic = APIC_DEFAULT_PHYS_BASE; + mpc_table.0.lapic = APIC_START.0 as u32; checksum = checksum.wrapping_add(compute_checksum(&mpc_table.0)); mpc_table.0.checksum = (!checksum).wrapping_add(1) as i8; mem.write_obj(mpc_table, table_base)