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https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2026-08-05 02:19:16 +00:00
misc: make topology a 4-tuple of u16s
This is the second patch in a series intended to let Cloud Hypervisor support more than 255 vCPUs in guest VMs; the first patch/commit is https://github.com/cloud-hypervisor/cloud-hypervisor/pull/7231 At the moment, CPU topology in Cloud Hypervisor is using u8 for components, and somewhat inconsistently: - struct CpuTopology in vmm/src/vm_config.rs uses four components (threads_per_core, cores_per_die, dies_per_package, packages); - when passed around as a tuple, it is a 3-tuple of u8, with some inconsistency: - in get_x2apic_id in arch/src/x86_64/mod.rs the three u8 are assumed to be (correctly) threads_per_core, cores_per_die, and dies_per_package, but - in get_vcpu_topology() in vmm/src/cpu.rs the three-tuple is threads_per_core, cores_per_die, and packages (dies_per_package is assumed to always be one? not clear). So for consistency, a 4-tuple is always passed around. In addition, the types of the tuple components is changed from u8 to u16, as on x86_64 subcomponents can consume up to 16 bits. Again, config constraints have not been changed, so this patch is mostly NOOP. Signed-off-by: Barret Rhoden <brho@google.com> Signed-off-by: Neel Natu <neelnatu@google.com> Signed-off-by: Ofir Weisse <oweisse@google.com> Signed-off-by: Peter Oskolkov <posk@google.com>
This commit is contained in:
committed by
Rob Bradford
parent
364a0972f0
commit
6e0403a959
@@ -285,7 +285,7 @@ fn create_tpm2_table() -> Sdt {
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fn create_srat_table(
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numa_nodes: &NumaNodes,
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#[cfg(target_arch = "x86_64")] topology: Option<(u8, u8, u8)>,
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#[cfg(target_arch = "x86_64")] topology: Option<(u16, u16, u16, u16)>,
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) -> Sdt {
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let mut srat = Sdt::new(*b"SRAT", 36, 3, *b"CLOUDH", *b"CHSRAT ", 1);
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// SRAT reserved 12 bytes
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@@ -390,7 +390,7 @@ impl Vcpu {
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boot_setup: Option<(EntryPoint, &GuestMemoryAtomic<GuestMemoryMmap>)>,
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#[cfg(target_arch = "x86_64")] cpuid: Vec<CpuIdEntry>,
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#[cfg(target_arch = "x86_64")] kvm_hyperv: bool,
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#[cfg(target_arch = "x86_64")] topology: Option<(u8, u8, u8)>,
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#[cfg(target_arch = "x86_64")] topology: Option<(u16, u16, u16, u16)>,
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) -> Result<()> {
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#[cfg(target_arch = "aarch64")]
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{
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@@ -884,8 +884,22 @@ impl CpuManager {
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#[cfg(target_arch = "x86_64")]
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let topology = self.config.topology.clone().map_or_else(
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|| Some((1, self.boot_vcpus().try_into().unwrap(), 1)),
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|t| Some((t.threads_per_core, t.cores_per_die, t.dies_per_package)),
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|| {
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Some((
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1_u16,
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u16::try_from(self.boot_vcpus()).unwrap(),
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1_u16,
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1_u16,
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))
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},
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|t| {
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Some((
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t.threads_per_core.into(),
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t.cores_per_die.into(),
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t.dies_per_package.into(),
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t.packages.into(),
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))
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},
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);
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#[cfg(target_arch = "x86_64")]
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vcpu.configure(
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@@ -1427,11 +1441,15 @@ impl CpuManager {
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.collect()
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}
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pub fn get_vcpu_topology(&self) -> Option<(u8, u8, u8)> {
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self.config
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.topology
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.clone()
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.map(|t| (t.threads_per_core, t.cores_per_die, t.packages))
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pub fn get_vcpu_topology(&self) -> Option<(u16, u16, u16, u16)> {
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self.config.topology.clone().map(|t| {
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(
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t.threads_per_core.into(),
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t.cores_per_die.into(),
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t.dies_per_package.into(),
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t.packages.into(),
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)
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})
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}
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#[cfg(not(target_arch = "riscv64"))]
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@@ -1574,9 +1592,10 @@ impl CpuManager {
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// If topology is not specified, the default setting is:
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// 1 package, multiple cores, 1 thread per core
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// This is also the behavior when PPTT is missing.
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let (threads_per_core, cores_per_package, packages) =
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self.get_vcpu_topology()
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.unwrap_or((1, self.max_vcpus().try_into().unwrap(), 1));
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let (threads_per_core, cores_per_die, dies_per_package, packages) = self
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.get_vcpu_topology()
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.unwrap_or((1, u16::try_from(self.max_vcpus()).unwrap(), 1, 1));
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let cores_per_package = cores_per_die * dies_per_package;
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let mut pptt = Sdt::new(*b"PPTT", 36, 2, *b"CLOUDH", *b"CHPPTT ", 1);
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@@ -1931,7 +1950,7 @@ struct Cpu {
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proximity_domain: u32,
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dynamic: bool,
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#[cfg(target_arch = "x86_64")]
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topology: Option<(u8, u8, u8)>,
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topology: Option<(u16, u16, u16, u16)>,
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}
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#[cfg(target_arch = "x86_64")]
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@@ -3582,7 +3582,7 @@ mod tests {
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&mem,
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"console=tty0",
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vec![0],
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Some((0, 0, 0)),
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Some((0, 0, 0, 0)),
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&dev_info,
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&gic,
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&None,
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