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arch, devices, vmm: Remove "acpi" feature gate
Compile this feature in by default as it's well supported on both aarch64 and x86_64 and we only officially support using it (no non-acpi binaries are available.) Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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+13
-15
@@ -242,7 +242,6 @@ fn create_memory_node(
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let mem_reg_prop = [memory_region_start_addr, memory_region_size];
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// With feature `acpi` enabled, RAM at 0-4M is for edk2 only
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// and should be hidden to the guest.
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#[cfg(feature = "acpi")]
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if memory_region_start_addr == 0 {
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continue;
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}
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@@ -548,20 +547,19 @@ fn create_pci_nodes(
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// could fall bellow 4G.
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// Here we cut off PCI device space below 8G in FDT to workaround the EDK2 check.
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// But the address written in ACPI is not impacted.
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let (pci_device_base_64bit, pci_device_size_64bit) = if cfg!(feature = "acpi")
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&& (pci_device_info_elem.pci_device_space_start < PCI_HIGH_BASE)
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{
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(
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PCI_HIGH_BASE,
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pci_device_info_elem.pci_device_space_size
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- (PCI_HIGH_BASE - pci_device_info_elem.pci_device_space_start),
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)
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} else {
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(
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pci_device_info_elem.pci_device_space_start,
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pci_device_info_elem.pci_device_space_size,
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)
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};
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let (pci_device_base_64bit, pci_device_size_64bit) =
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if pci_device_info_elem.pci_device_space_start < PCI_HIGH_BASE {
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(
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PCI_HIGH_BASE,
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pci_device_info_elem.pci_device_space_size
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- (PCI_HIGH_BASE - pci_device_info_elem.pci_device_space_start),
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)
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} else {
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(
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pci_device_info_elem.pci_device_space_start,
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pci_device_info_elem.pci_device_space_size,
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)
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};
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// There is no specific requirement of the 32bit MMIO range, and
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// therefore at least we can make these ranges 4K aligned.
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let pci_device_size_32bit: u64 =
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