pci, virtio-devices: Extend barrier returning through PCI code

We need to be able to return the barrier from the code that prepares to
activate the virtio device. This triggered by a write to the
configuration fields stored in the PCI BAR. Since bars can be accessed
by both memory mapping and through PCI config I/O several prototypes
must be changed.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

pci/src/bus.rs

@@ -71,8 +71,14 @@ impl PciRoot {
 impl BusDevice for PciRoot {}
 
 impl PciDevice for PciRoot {
-    fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]) {
+    fn write_config_register(
+        &mut self,
+        reg_idx: usize,
+        offset: u64,
+        data: &[u8],
+    ) -> Option<Arc<Barrier>> {
         self.config.write_config_register(reg_idx, offset, data);
+        None
     }
 
     fn read_config_register(&mut self, reg_idx: usize) -> u32 {
@@ -225,14 +231,14 @@ impl PciConfigIo {
             })
     }
 
-    pub fn config_space_write(&mut self, offset: u64, data: &[u8]) {
+    pub fn config_space_write(&mut self, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
         if offset as usize + data.len() > 4 {
-            return;
+            return None;
         }
 
         let enabled = (self.config_address & 0x8000_0000) != 0;
         if !enabled {
-            return;
+            return None;
         }
 
         let (bus, device, _function, register) =
@@ -240,7 +246,7 @@ impl PciConfigIo {
 
         // Only support one bus.
         if bus != 0 {
-            return;
+            return None;
         }
 
         let pci_bus = self.pci_bus.lock().unwrap();
@@ -265,7 +271,9 @@ impl PciConfigIo {
             }
 
             // Update the register value
-            device.write_config_register(register, offset, data);
+            device.write_config_register(register, offset, data)
+        } else {
+            None
         }
     }
 
@@ -315,12 +323,13 @@ impl BusDevice for PciConfigIo {
     fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
         // `offset` is relative to 0xcf8
         match offset {
-            o @ 0..=3 => self.set_config_address(o, data),
+            o @ 0..=3 => {
+                self.set_config_address(o, data);
+                None
+            }
             o @ 4..=7 => self.config_space_write(o - 4, data),
-            _ => (),
-        };
-
-        None
+            _ => None,
+        }
     }
 }