vm-virtio: Initial crate

Copied from Firecracker 17a9089d for the queue implementation and from
crosvm 107edb3e for the device Trait. The device trait has some PCI
specific methods hence its crosvm origin.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

vm-virtio/src/device.rs

@@ -0,0 +1,66 @@
+// Copyright 2018 The Chromium OS Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+use super::*;
+use pci::{PciBarConfiguration, PciCapability};
+use std::sync::atomic::AtomicUsize;
+use std::sync::Arc;
+use vm_memory::GuestMemoryMmap;
+use vmm_sys_util::EventFd;
+
+/// Trait for virtio devices to be driven by a virtio transport.
+///
+/// The lifecycle of a virtio device is to be moved to a virtio transport, which will then query the
+/// device. Once the guest driver has configured the device, `VirtioDevice::activate` will be called
+/// and all the events, memory, and queues for device operation will be moved into the device.
+/// Optionally, a virtio device can implement device reset in which it returns said resources and
+/// resets its internal.
+pub trait VirtioDevice: Send {
+    /// The virtio device type.
+    fn device_type(&self) -> u32;
+
+    /// The maximum size of each queue that this device supports.
+    fn queue_max_sizes(&self) -> &[u16];
+
+    /// The set of feature bits shifted by `page * 32`.
+    fn features(&self, page: u32) -> u32 {
+        let _ = page;
+        0
+    }
+
+    /// Acknowledges that this set of features should be enabled.
+    fn ack_features(&mut self, page: u32, value: u32);
+
+    /// Reads this device configuration space at `offset`.
+    fn read_config(&self, offset: u64, data: &mut [u8]);
+
+    /// Writes to this device configuration space at `offset`.
+    fn write_config(&mut self, offset: u64, data: &[u8]);
+
+    /// Activates this device for real usage.
+    fn activate(
+        &mut self,
+        mem: GuestMemoryMmap,
+        interrupt_evt: EventFd,
+        status: Arc<AtomicUsize>,
+        queues: Vec<Queue>,
+        queue_evts: Vec<EventFd>,
+    ) -> ActivateResult;
+
+    /// Optionally deactivates this device and returns ownership of the guest memory map, interrupt
+    /// event, and queue events.
+    fn reset(&mut self) -> Option<(EventFd, Vec<EventFd>)> {
+        None
+    }
+
+    /// Returns any additional BAR configuration required by the device.
+    fn get_device_bars(&self) -> Vec<PciBarConfiguration> {
+        Vec::new()
+    }
+
+    /// Returns any additional capabilities required by the device.
+    fn get_device_caps(&self) -> Vec<Box<dyn PciCapability>> {
+        Vec::new()
+    }
+}