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hypervisor: turn boot_msr_entries into a trait method

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This allows dispatching to either KVM or MSHV automatically.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
Wei Liu
2022-07-08 14:08:10 +00:00
committed by Rob Bradford
parent 121729a3b0
commit 84bbaf06d1
7 changed files with 56 additions and 40 deletions
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21
hypervisor/src/mshv/mod.rs
View File

@@ -593,6 +593,27 @@ impl cpu::Vcpu for MshvVcpu {
.get_suspend_regs()
.map_err(|e| cpu::HypervisorCpuError::GetSuspendRegs(e.into()))
}
#[cfg(target_arch = "x86_64")]
///
/// Return the list of initial MSR entries for a VCPU
///
fn boot_msr_entries(&self) -> MsrEntries {
use crate::arch::x86::{msr_index, MTRR_ENABLE, MTRR_MEM_TYPE_WB};
MsrEntries::from_entries(&[
msr!(msr_index::MSR_IA32_SYSENTER_CS),
msr!(msr_index::MSR_IA32_SYSENTER_ESP),
msr!(msr_index::MSR_IA32_SYSENTER_EIP),
msr!(msr_index::MSR_STAR),
msr!(msr_index::MSR_CSTAR),
msr!(msr_index::MSR_LSTAR),
msr!(msr_index::MSR_KERNEL_GS_BASE),
msr!(msr_index::MSR_SYSCALL_MASK),
msr!(msr_index::MSR_IA32_TSC),
msr_data!(msr_index::MSR_MTRRdefType, MTRR_ENABLE | MTRR_MEM_TYPE_WB),
])
.unwrap()
}
}
/// Device struct for MSHV

18
hypervisor/src/mshv/x86_64/mod.rs
View File

@@ -7,7 +7,7 @@
// Copyright 2018-2019 CrowdStrike, Inc.
//
//
use crate::arch::x86::{msr_index, SegmentRegisterOps, MTRR_ENABLE, MTRR_MEM_TYPE_WB};
use crate::arch::x86::SegmentRegisterOps;
use serde::{Deserialize, Serialize};
use std::fmt;
@@ -134,19 +134,3 @@ impl SegmentRegisterOps for SegmentRegister {
self.db = val;
}
}
pub fn boot_msr_entries() -> MsrEntries {
MsrEntries::from_entries(&[
msr!(msr_index::MSR_IA32_SYSENTER_CS),
msr!(msr_index::MSR_IA32_SYSENTER_ESP),
msr!(msr_index::MSR_IA32_SYSENTER_EIP),
msr!(msr_index::MSR_STAR),
msr!(msr_index::MSR_CSTAR),
msr!(msr_index::MSR_LSTAR),
msr!(msr_index::MSR_KERNEL_GS_BASE),
msr!(msr_index::MSR_SYSCALL_MASK),
msr!(msr_index::MSR_IA32_TSC),
msr_data!(msr_index::MSR_MTRRdefType, MTRR_ENABLE | MTRR_MEM_TYPE_WB),
])
.unwrap()
}