misc: Adapt consistent import style formatting

Historically the Cloud Hypervisor coding style has been to ensure that
all imports are ordered and placed in a single group. Unfortunately
cargo fmt has no support for ensuring that all imports are in a single
group so if whitespace lines were added as part of the import statements
then they would only be odered correctly in the group.

By adopting "group_imports="StdExternalCrate" we can enforce a style
where imports are placed in at most three groups for std, external
crates and the crate itself. Choosing a style enforceable by the tooling
reduces the reviewer burden.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

devices/src/acpi.rs

@@ -3,17 +3,19 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
-use super::AcpiNotificationFlags;
-use acpi_tables::{aml, Aml, AmlSink};
 use std::sync::atomic::{AtomicBool, Ordering};
 use std::sync::{Arc, Barrier};
 use std::thread;
 use std::time::Instant;
+
+use acpi_tables::{aml, Aml, AmlSink};
 use vm_device::interrupt::InterruptSourceGroup;
 use vm_device::BusDevice;
 use vm_memory::GuestAddress;
 use vmm_sys_util::eventfd::EventFd;
 
+use super::AcpiNotificationFlags;
+
 pub const GED_DEVICE_ACPI_SIZE: usize = 0x1;
 
 /// A device for handling ACPI shutdown and reboot

devices/src/debug_console.rs

@@ -8,6 +8,7 @@
 use std::io;
 use std::io::Write;
 use std::sync::{Arc, Barrier};
+
 use vm_device::BusDevice;
 use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
 

devices/src/gic.rs

@@ -4,14 +4,15 @@
 
 use super::interrupt_controller::{Error, InterruptController};
 extern crate arch;
+use std::result;
+use std::sync::{Arc, Mutex};
+
 use anyhow::anyhow;
 use arch::layout;
 use hypervisor::{
     arch::aarch64::gic::{Vgic, VgicConfig},
     CpuState, GicState,
 };
-use std::result;
-use std::sync::{Arc, Mutex};
 use vm_device::interrupt::{
     InterruptIndex, InterruptManager, InterruptSourceConfig, InterruptSourceGroup,
     LegacyIrqSourceConfig, MsiIrqGroupConfig,

devices/src/interrupt_controller.rs

@@ -4,6 +4,7 @@
 
 use std::io;
 use std::result;
+
 use thiserror::Error;
 use vmm_sys_util::eventfd::EventFd;
 

devices/src/ioapic.rs

@@ -9,11 +9,11 @@
 // Implementation of an intel 82093AA Input/Output Advanced Programmable Interrupt Controller
 // See https://pdos.csail.mit.edu/6.828/2016/readings/ia32/ioapic.pdf for a specification.
 
-use super::interrupt_controller::{Error, InterruptController};
-use byteorder::{ByteOrder, LittleEndian};
-use serde::{Deserialize, Serialize};
 use std::result;
 use std::sync::{Arc, Barrier};
+
+use byteorder::{ByteOrder, LittleEndian};
+use serde::{Deserialize, Serialize};
 use vm_device::interrupt::{
     InterruptIndex, InterruptManager, InterruptSourceConfig, InterruptSourceGroup,
     MsiIrqGroupConfig, MsiIrqSourceConfig,
@@ -23,6 +23,8 @@ use vm_memory::GuestAddress;
 use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
 use vmm_sys_util::eventfd::EventFd;
 
+use super::interrupt_controller::{Error, InterruptController};
+
 type Result<T> = result::Result<T, Error>;
 
 // I/O REDIRECTION TABLE REGISTER

devices/src/legacy/cmos.rs

@@ -4,18 +4,18 @@
 //
 // SPDX-License-Identifier: Apache-2.0 AND BSD-3-Clause
 
-use libc::{clock_gettime, gmtime_r, timespec, tm, CLOCK_REALTIME};
 use std::cmp::min;
 use std::mem;
 use std::sync::atomic::{AtomicBool, Ordering};
 use std::sync::{Arc, Barrier};
 use std::thread;
-use vm_device::BusDevice;
-use vmm_sys_util::eventfd::EventFd;
 
 // https://github.com/rust-lang/libc/issues/1848
 #[cfg_attr(target_env = "musl", allow(deprecated))]
 use libc::time_t;
+use libc::{clock_gettime, gmtime_r, timespec, tm, CLOCK_REALTIME};
+use vm_device::BusDevice;
+use vmm_sys_util::eventfd::EventFd;
 
 const INDEX_MASK: u8 = 0x7f;
 const INDEX_OFFSET: u64 = 0x0;

devices/src/legacy/debug_port.rs

@@ -5,6 +5,7 @@
 
 use std::fmt;
 use std::time::Instant;
+
 use vm_device::BusDevice;
 
 /// Debug I/O port, see:

devices/src/legacy/fwdebug.rs

@@ -8,6 +8,7 @@
 //
 
 use std::sync::{Arc, Barrier};
+
 use vm_device::BusDevice;
 
 /// Provides firmware debug output via I/O port controls

devices/src/legacy/gpio_pl061.rs

@@ -7,16 +7,18 @@
 //! This module implements an ARM PrimeCell General Purpose Input/Output(PL061) to support gracefully poweroff microvm from external.
 //!
 
-use crate::{read_le_u32, write_le_u32};
-use serde::{Deserialize, Serialize};
 use std::io;
 use std::result;
 use std::sync::{Arc, Barrier};
+
+use serde::{Deserialize, Serialize};
 use thiserror::Error;
 use vm_device::interrupt::InterruptSourceGroup;
 use vm_device::BusDevice;
 use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
 
+use crate::{read_le_u32, write_le_u32};
+
 const OFS_DATA: u64 = 0x400; // Data Register
 const GPIODIR: u64 = 0x400; // Direction Register
 const GPIOIS: u64 = 0x404; // Interrupt Sense Register
@@ -323,10 +325,11 @@ impl Migratable for Gpio {}
 
 #[cfg(test)]
 mod tests {
-    use super::*;
     use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
     use vmm_sys_util::eventfd::EventFd;
 
+    use super::*;
+
     const GPIO_NAME: &str = "gpio";
     const LEGACY_GPIO_MAPPED_IO_START: u64 = 0x0902_0000;
 

devices/src/legacy/i8042.rs

@@ -9,6 +9,7 @@ use std::sync::{
     Arc, Barrier,
 };
 use std::thread;
+
 use vm_device::BusDevice;
 use vmm_sys_util::eventfd::EventFd;
 

devices/src/legacy/mod.rs

@@ -24,14 +24,13 @@ pub use self::cmos::Cmos;
 pub use self::debug_port::DebugPort;
 #[cfg(target_arch = "x86_64")]
 pub use self::fwdebug::FwDebugDevice;
-pub use self::i8042::I8042Device;
-pub use self::serial::Serial;
-
 #[cfg(target_arch = "aarch64")]
 pub use self::gpio_pl061::Error as GpioDeviceError;
 #[cfg(target_arch = "aarch64")]
 pub use self::gpio_pl061::Gpio;
+pub use self::i8042::I8042Device;
 #[cfg(target_arch = "aarch64")]
 pub use self::rtc_pl031::Rtc;
+pub use self::serial::Serial;
 #[cfg(target_arch = "aarch64")]
 pub use self::uart_pl011::Pl011;

devices/src/legacy/rtc_pl031.rs

@@ -8,14 +8,16 @@
 //! This is achieved by generating an interrupt signal after counting for a programmed number of cycles of
 //! a real-time clock input.
 //!
-use crate::{read_le_u32, write_le_u32};
 use std::sync::{Arc, Barrier};
 use std::time::Instant;
 use std::{io, result};
+
 use thiserror::Error;
 use vm_device::interrupt::InterruptSourceGroup;
 use vm_device::BusDevice;
 
+use crate::{read_le_u32, write_le_u32};
+
 // As you can see in https://static.docs.arm.com/ddi0224/c/real_time_clock_pl031_r1p3_technical_reference_manual_DDI0224C.pdf
 // at section 3.2 Summary of RTC registers, the total size occupied by this device is 0x000 -> 0xFFC + 4 = 0x1000.
 // From 0x0 to 0x1C we have following registers:
@@ -228,13 +230,14 @@ impl BusDevice for Rtc {
 
 #[cfg(test)]
 mod tests {
+    use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
+    use vmm_sys_util::eventfd::EventFd;
+
     use super::*;
     use crate::{
         read_be_u16, read_be_u32, read_le_i32, read_le_u16, read_le_u64, write_be_u16,
         write_be_u32, write_le_i32, write_le_u16, write_le_u64,
     };
-    use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
-    use vmm_sys_util::eventfd::EventFd;
 
     const LEGACY_RTC_MAPPED_IO_START: u64 = 0x0901_0000;
 

devices/src/legacy/serial.rs

@@ -5,10 +5,11 @@
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE-BSD-3-Clause file.
 
-use serde::{Deserialize, Serialize};
 use std::collections::VecDeque;
 use std::sync::{Arc, Barrier};
 use std::{io, result};
+
+use serde::{Deserialize, Serialize};
 use vm_device::interrupt::InterruptSourceGroup;
 use vm_device::BusDevice;
 use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
@@ -340,11 +341,13 @@ impl Migratable for Serial {}
 
 #[cfg(test)]
 mod tests {
-    use super::*;
     use std::sync::Mutex;
+
     use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
     use vmm_sys_util::eventfd::EventFd;
 
+    use super::*;
+
     const SERIAL_NAME: &str = "serial";
 
     struct TestInterrupt {

devices/src/legacy/uart_pl011.rs

@@ -6,17 +6,19 @@
 //! This module implements an ARM PrimeCell UART(PL011).
 //!
 
-use crate::{read_le_u32, write_le_u32};
-use serde::{Deserialize, Serialize};
 use std::collections::VecDeque;
 use std::sync::{Arc, Barrier};
 use std::time::Instant;
 use std::{io, result};
+
+use serde::{Deserialize, Serialize};
 use thiserror::Error;
 use vm_device::interrupt::InterruptSourceGroup;
 use vm_device::BusDevice;
 use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
 
+use crate::{read_le_u32, write_le_u32};
+
 /* Registers */
 const UARTDR: u64 = 0;
 const UARTRSR_UARTECR: u64 = 1;
@@ -452,11 +454,13 @@ impl Migratable for Pl011 {}
 
 #[cfg(test)]
 mod tests {
-    use super::*;
     use std::sync::Mutex;
+
     use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
     use vmm_sys_util::eventfd::EventFd;
 
+    use super::*;
+
     const SERIAL_NAME: &str = "serial";
 
     struct TestInterrupt {

devices/src/pvmemcontrol.rs

@@ -3,17 +3,18 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
-use num_enum::TryFromPrimitive;
-use pci::{
-    BarReprogrammingParams, PciBarConfiguration, PciBarPrefetchable, PciBarRegionType,
-    PciClassCode, PciConfiguration, PciDevice, PciDeviceError, PciHeaderType, PciSubclass,
-};
 use std::{
     collections::HashMap,
     ffi::CString,
     io, result,
     sync::{Arc, Barrier, Mutex, RwLock},
 };
+
+use num_enum::TryFromPrimitive;
+use pci::{
+    BarReprogrammingParams, PciBarConfiguration, PciBarPrefetchable, PciBarRegionType,
+    PciClassCode, PciConfiguration, PciDevice, PciDeviceError, PciHeaderType, PciSubclass,
+};
 use thiserror::Error;
 use vm_allocator::{page_size::get_page_size, AddressAllocator, SystemAllocator};
 use vm_device::{BusDeviceSync, Resource};

devices/src/pvpanic.rs

@@ -3,6 +3,10 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
+use std::any::Any;
+use std::result;
+use std::sync::{Arc, Barrier, Mutex};
+
 use anyhow::anyhow;
 use pci::{
     BarReprogrammingParams, PciBarConfiguration, PciBarPrefetchable, PciBarRegionType,
@@ -10,9 +14,6 @@ use pci::{
     PCI_CONFIGURATION_ID,
 };
 use serde::{Deserialize, Serialize};
-use std::any::Any;
-use std::result;
-use std::sync::{Arc, Barrier, Mutex};
 use thiserror::Error;
 use vm_allocator::{AddressAllocator, SystemAllocator};
 use vm_device::{BusDevice, Resource};

devices/src/tpm.rs

@@ -3,13 +3,14 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
+use std::cmp;
+use std::sync::{Arc, Barrier};
+
 use anyhow::anyhow;
 #[cfg(target_arch = "aarch64")]
 use arch::aarch64::layout::{TPM_SIZE, TPM_START};
 #[cfg(target_arch = "x86_64")]
 use arch::x86_64::layout::{TPM_SIZE, TPM_START};
-use std::cmp;
-use std::sync::{Arc, Barrier};
 use thiserror::Error;
 use tpm::emulator::{BackendCmd, Emulator};
 use tpm::TPM_CRB_BUFFER_MAX;