misc: Adapt consistent import style formatting

Historically the Cloud Hypervisor coding style has been to ensure that
all imports are ordered and placed in a single group. Unfortunately
cargo fmt has no support for ensuring that all imports are in a single
group so if whitespace lines were added as part of the import statements
then they would only be odered correctly in the group.

By adopting "group_imports="StdExternalCrate" we can enforce a style
where imports are placed in at most three groups for std, external
crates and the crate itself. Choosing a style enforceable by the tooling
reduces the reviewer burden.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

hypervisor/src/arch/aarch64/gic.rs

@@ -2,11 +2,13 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::{CpuState, GicState, HypervisorDeviceError, HypervisorVmError};
 use std::any::Any;
 use std::result;
+
 use thiserror::Error;
 
+use crate::{CpuState, GicState, HypervisorDeviceError, HypervisorVmError};
+
 /// Errors thrown while setting up the VGIC.
 #[derive(Debug, Error)]
 pub enum Error {

hypervisor/src/arch/emulator/mod.rs

@@ -6,6 +6,7 @@
 
 use core::fmt::Debug;
 use std::fmt::{self, Display};
+
 use thiserror::Error;
 
 #[derive(Clone, Copy, Error, Debug)]

hypervisor/src/arch/x86/emulator/instructions/mod.rs

@@ -4,10 +4,11 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
+use iced_x86::*;
+
 use crate::arch::emulator::{EmulationError, PlatformEmulator, PlatformError};
 use crate::arch::x86::emulator::CpuStateManager;
 use crate::arch::x86::Exception;
-use iced_x86::*;
 
 pub mod cmp;
 pub mod mov;

hypervisor/src/arch/x86/emulator/instructions/or.rs

@@ -51,7 +51,6 @@ impl<T: CpuStateManager> InstructionHandler<T> for Or_rm8_r8 {
 #[cfg(test)]
 mod tests {
     use super::*;
-
     use crate::arch::x86::emulator::mock_vmm::*;
 
     #[test]

hypervisor/src/arch/x86/emulator/mod.rs

@@ -4,6 +4,9 @@
 // SPDX-License-Identifier: Apache-2.0
 //
 
+use anyhow::Context;
+use iced_x86::*;
+
 use crate::arch::emulator::{EmulationError, EmulationResult, PlatformEmulator, PlatformError};
 use crate::arch::x86::emulator::instructions::*;
 use crate::arch::x86::regs::{CR0_PE, EFER_LMA};
@@ -11,8 +14,6 @@ use crate::arch::x86::{
     segment_type_expand_down, segment_type_ro, Exception, SegmentRegister, SpecialRegisters,
 };
 use crate::StandardRegisters;
-use anyhow::Context;
-use iced_x86::*;
 
 #[macro_use]
 mod instructions;
@@ -653,11 +654,12 @@ impl<'a, T: CpuStateManager> Emulator<'a, T> {
 
 #[cfg(test)]
 mod mock_vmm {
+    use std::sync::{Arc, Mutex};
+
     use super::*;
     use crate::arch::x86::emulator::EmulatorCpuState as CpuState;
     use crate::arch::x86::gdt::{gdt_entry, segment_from_gdt};
     use crate::StandardRegisters;
-    use std::sync::{Arc, Mutex};
 
     #[derive(Debug, Clone)]
     pub struct MockVmm {

hypervisor/src/arch/x86/mod.rs

@@ -242,10 +242,11 @@ impl Default for LapicState {
 
 impl LapicState {
     pub fn get_klapic_reg(&self, reg_offset: usize) -> u32 {
-        use byteorder::{LittleEndian, ReadBytesExt};
         use std::io::Cursor;
         use std::mem;
 
+        use byteorder::{LittleEndian, ReadBytesExt};
+
         // SAFETY: plain old data type
         let sliceu8 = unsafe {
             // This array is only accessed as parts of a u32 word, so interpret it as a u8 array.
@@ -261,10 +262,11 @@ impl LapicState {
     }
 
     pub fn set_klapic_reg(&mut self, reg_offset: usize, value: u32) {
-        use byteorder::{LittleEndian, WriteBytesExt};
         use std::io::Cursor;
         use std::mem;
 
+        use byteorder::{LittleEndian, WriteBytesExt};
+
         // SAFETY: plain old data type
         let sliceu8 = unsafe {
             // This array is only accessed as parts of a u32 word, so interpret it as a u8 array.