From 99f5537984cdacdf2ae12101dce6cbda594b99f2 Mon Sep 17 00:00:00 2001 From: Ruben Hakobyan Date: Thu, 28 May 2026 19:01:32 -0700 Subject: [PATCH] arch: x86_64: Stop applying SME c-bit reduction to phys_bits get_host_cpu_phys_bits() subtracts the SME c-bit reduction from PhysAddrSize (CPUID 0x80000008 EAX bits 7:0). The result sets the guest's CPUID and MMIO address space size. The c-bit reduction is not needed here. QEMU's equivalent (host_cpu_phys_bits() in target/i386/host-cpu.c) returns PhysAddrSize without reduction. Signed-off-by: Ruben Hakobyan --- arch/src/x86_64/mod.rs | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/arch/src/x86_64/mod.rs b/arch/src/x86_64/mod.rs index 8acd4de24..f0c42c55e 100644 --- a/arch/src/x86_64/mod.rs +++ b/arch/src/x86_64/mod.rs @@ -1413,27 +1413,15 @@ pub fn initramfs_load_addr( Ok(aligned_addr) } -pub fn get_host_cpu_phys_bits(hypervisor: &dyn hypervisor::Hypervisor) -> u8 { +pub fn get_host_cpu_phys_bits(_hypervisor: &dyn hypervisor::Hypervisor) -> u8 { // SAFETY: call cpuid with valid leaves #[allow(unused_unsafe)] unsafe { let leaf = x86_64::__cpuid(0x8000_0000); - // Detect and handle AMD SME (Secure Memory Encryption) properly. - // Some physical address bits may become reserved when the feature is enabled. - // See AMD64 Architecture Programmer's Manual Volume 2, Section 7.10.1 - let reduced = if leaf.eax >= 0x8000_001f - && matches!(hypervisor.get_cpu_vendor(), CpuVendor::AMD) - && x86_64::__cpuid(0x8000_001f).eax & 0x1 != 0 - { - (x86_64::__cpuid(0x8000_001f).ebx >> 6) & 0x3f - } else { - 0 - }; - if leaf.eax >= 0x8000_0008 { let leaf = x86_64::__cpuid(0x8000_0008); - ((leaf.eax & 0xff) - reduced) as u8 + (leaf.eax & 0xff) as u8 } else { 36 }