vmm: Remove "gicr" handling from DeviceManager

The function used to calculate "gicr-typer" value has nothing with
DeviceManager. Now it is moved to AArch64 specific files.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

arch/src/aarch64/gic/gicv3.rs

@@ -5,11 +5,14 @@ pub mod kvm {
     use crate::aarch64::gic::dist_regs::{get_dist_regs, read_ctlr, set_dist_regs, write_ctlr};
     use crate::aarch64::gic::icc_regs::{get_icc_regs, set_icc_regs};
     use crate::aarch64::gic::kvm::{save_pending_tables, KvmGicDevice};
-    use crate::aarch64::gic::redist_regs::{get_redist_regs, set_redist_regs};
+    use crate::aarch64::gic::redist_regs::{
+        construct_gicr_typers, get_redist_regs, set_redist_regs,
+    };
     use crate::aarch64::gic::GicDevice;
     use crate::layout;
     use anyhow::anyhow;
     use hypervisor::kvm::kvm_bindings;
+    use hypervisor::CpuState;
     use std::any::Any;
     use std::convert::TryInto;
     use std::sync::Arc;
@@ -165,7 +168,8 @@ pub mod kvm {
             self.vcpu_count
         }
 
-        fn set_gicr_typers(&mut self, gicr_typers: Vec<u64>) {
+        fn set_gicr_typers(&mut self, vcpu_states: &[CpuState]) {
+            let gicr_typers = construct_gicr_typers(vcpu_states);
             self.gicr_typers = gicr_typers;
         }
 

arch/src/aarch64/gic/gicv3_its.rs

@@ -10,6 +10,7 @@ pub mod kvm {
     use crate::aarch64::gic::kvm::KvmGicDevice;
     use crate::aarch64::gic::{Error, GicDevice};
     use hypervisor::kvm::kvm_bindings;
+    use hypervisor::CpuState;
 
     pub struct KvmGicV3Its {
         /// The hypervisor agnostic device
@@ -70,7 +71,7 @@ pub mod kvm {
             self.vcpu_count
         }
 
-        fn set_gicr_typers(&mut self, _gicr_typers: Vec<u64>) {}
+        fn set_gicr_typers(&mut self, _vcpu_states: &[CpuState]) {}
 
         fn as_any_concrete_mut(&mut self) -> &mut dyn Any {
             self

arch/src/aarch64/gic/mod.rs

@@ -10,6 +10,7 @@ pub mod redist_regs;
 pub use self::dist_regs::{get_dist_regs, read_ctlr, set_dist_regs, write_ctlr};
 pub use self::icc_regs::{get_icc_regs, set_icc_regs};
 pub use self::redist_regs::{get_redist_regs, set_redist_regs};
+use hypervisor::CpuState;
 use std::any::Any;
 use std::result;
 use std::sync::Arc;
@@ -58,7 +59,7 @@ pub trait GicDevice: Send {
     }
 
     /// Get the values of GICR_TYPER for each vCPU.
-    fn set_gicr_typers(&mut self, gicr_typers: Vec<u64>);
+    fn set_gicr_typers(&mut self, vcpu_states: &[CpuState]);
 
     /// Downcast the trait object to its concrete type.
     fn as_any_concrete_mut(&mut self) -> &mut dyn Any;

arch/src/aarch64/gic/redist_regs.rs

@@ -3,6 +3,7 @@
 
 use super::{Error, Result};
 use hypervisor::kvm::kvm_bindings::{kvm_device_attr, KVM_DEV_ARM_VGIC_GRP_REDIST_REGS};
+use hypervisor::CpuState;
 use std::sync::Arc;
 
 // Relevant redistributor registers that we want to save/restore.
@@ -177,3 +178,34 @@ pub fn set_redist_regs(
         true,
     )
 }
+
+pub fn construct_gicr_typers(vcpu_states: &[CpuState]) -> Vec<u64> {
+    /* Pre-construct the GICR_TYPER:
+     * For our implementation:
+     *  Top 32 bits are the affinity value of the associated CPU
+     *  CommonLPIAff == 01 (redistributors with same Aff3 share LPI table)
+     *  Processor_Number == CPU index starting from 0
+     *  DPGS == 0 (GICR_CTLR.DPG* not supported)
+     *  Last == 1 if this is the last redistributor in a series of
+     *            contiguous redistributor pages
+     *  DirectLPI == 0 (direct injection of LPIs not supported)
+     *  VLPIS == 0 (virtual LPIs not supported)
+     *  PLPIS == 0 (physical LPIs not supported)
+     */
+    let mut gicr_typers: Vec<u64> = Vec::new();
+    for (index, state) in vcpu_states.iter().enumerate() {
+        let last = {
+            if index == vcpu_states.len() - 1 {
+                1
+            } else {
+                0
+            }
+        };
+        //calculate affinity
+        let mut cpu_affid = state.mpidr & 1095233437695;
+        cpu_affid = ((cpu_affid & 0xFF00000000) >> 8) | (cpu_affid & 0xFFFFFF);
+        gicr_typers.push((cpu_affid << 32) | (1 << 24) | (index as u64) << 8 | (last << 4));
+    }
+
+    gicr_typers
+}