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build: Remove unnecessary Result<> returns

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If the function can never return an error this is now a clippy failure:

error: this function's return value is unnecessarily wrapped by `Result`
   --> virtio-devices/src/watchdog.rs:215:5
    |
215 | /     fn set_state(&mut self, state: &WatchdogState) -> io::Result<()> {
216 | |         self.common.avail_features = state.avail_features;
217 | |         self.common.acked_features = state.acked_features;
218 | |         // When restoring enable the watchdog if it was previously enabled. We reset the timer
...   |
223 | |         Ok(())
224 | |     }
    | |_____^
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#unnecessary_wraps

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
2021-02-11 16:00:53 +00:00
parent 8e9a5a0dbb
commit 9c5be6f660
19 changed files with 198 additions and 334 deletions
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24
hypervisor/src/arch/x86/emulator/instructions/cmp.rs
View File

@@ -224,7 +224,7 @@ mod tests {
#[test]
// cmp ah,al
fn test_cmp_rm8_r8_1() -> MockResult {
fn test_cmp_rm8_r8_1() {
let rax: u64 = 0x0;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -234,13 +234,11 @@ mod tests {
let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
assert_eq!(0b1000100, rflags);
Ok(())
}
#[test]
// cmp eax,100
fn test_cmp_rm32_imm8_1() -> MockResult {
fn test_cmp_rm32_imm8_1() {
let rax: u64 = 0xabcdef;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -250,13 +248,11 @@ mod tests {
let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
assert_eq!(0b100, rflags);
Ok(())
}
#[test]
// cmp eax,-1
fn test_cmp_rm32_imm8_2() -> MockResult {
fn test_cmp_rm32_imm8_2() {
let rax: u64 = 0xabcdef;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -266,13 +262,11 @@ mod tests {
let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
assert_eq!(0b101, rflags);
Ok(())
}
#[test]
// cmp rax,rbx
fn test_cmp_rm64_r64() -> MockResult {
fn test_cmp_rm64_r64() {
let rax: u64 = 0xabcdef;
let rbx: u64 = 0x1234;
let ip: u64 = 0x1000;
@@ -283,12 +277,10 @@ mod tests {
let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
assert_eq!(0b100, rflags);
Ok(())
}
#[test]
fn test_cmp_64() -> MockResult {
fn test_cmp_64() {
let data = [
(0xabcdef, 0x1234, 0b100),
(0x0, 0x101, 0b1001_0101),
@@ -313,12 +305,10 @@ mod tests {
let rflags: u64 = vmm.cpu_state(0).unwrap().flags() & FLAGS_MASK;
assert_eq!(d.2, rflags);
}
Ok(())
}
#[test]
fn test_cmp_32() -> MockResult {
fn test_cmp_32() {
let data = [
(0xabcdef, 0x1234, 0b100),
(0x0, 0x101, 0b1001_0101),
@@ -343,7 +333,5 @@ mod tests {
let rflags: u64 = vmm.cpu_state(0).unwrap().flags() & FLAGS_MASK;
assert_eq!(d.2, rflags);
}
Ok(())
}
}

68
hypervisor/src/arch/x86/emulator/instructions/mov.rs
View File

@@ -249,7 +249,7 @@ mod tests {
#[test]
// mov rax,rbx
fn test_mov_r64_r64() -> MockResult {
fn test_mov_r64_r64() {
let rbx: u64 = 0x8899aabbccddeeff;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -263,13 +263,11 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, rbx);
Ok(())
}
#[test]
// mov rax,0x1122334411223344
fn test_mov_r64_imm64() -> MockResult {
fn test_mov_r64_imm64() {
let imm64: u64 = 0x1122334411223344;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -283,13 +281,11 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, imm64);
Ok(())
}
#[test]
// mov rax, [rax+rax]
fn test_mov_r64_m64() -> MockResult {
fn test_mov_r64_m64() {
let target_rax: u64 = 0x1234567812345678;
let mut rax: u64 = 0x100;
let ip: u64 = 0x1000;
@@ -305,13 +301,11 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, target_rax);
Ok(())
}
#[test]
// mov al,0x11
fn test_mov_r8_imm8() -> MockResult {
fn test_mov_r8_imm8() {
let imm8: u8 = 0x11;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -325,13 +319,11 @@ mod tests {
.read_reg(Register::AL)
.unwrap();
assert_eq!(al as u8, imm8);
Ok(())
}
#[test]
// mov eax,0x11
fn test_mov_r32_imm8() -> MockResult {
fn test_mov_r32_imm8() {
let imm8: u8 = 0x11;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -345,13 +337,11 @@ mod tests {
.read_reg(Register::EAX)
.unwrap();
assert_eq!(eax as u8, imm8);
Ok(())
}
#[test]
// mov rax,0x11223344
fn test_mov_r64_imm32() -> MockResult {
fn test_mov_r64_imm32() {
let imm32: u32 = 0x11223344;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -365,13 +355,11 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, imm32 as u64);
Ok(())
}
#[test]
// mov byte ptr [rax],dh
fn test_mov_m8_r8() -> MockResult {
fn test_mov_m8_r8() {
let rax: u64 = 0x100;
let dh: u8 = 0x99;
let ip: u64 = 0x1000;
@@ -388,13 +376,11 @@ mod tests {
vmm.read_memory(rax, &mut memory).unwrap();
assert_eq!(u8::from_le_bytes(memory), dh);
Ok(())
}
#[test]
// mov dword ptr [rax],esi
fn test_mov_m32_r32() -> MockResult {
fn test_mov_m32_r32() {
let rax: u64 = 0x100;
let esi: u32 = 0x8899;
let ip: u64 = 0x1000;
@@ -411,13 +397,11 @@ mod tests {
vmm.read_memory(rax, &mut memory).unwrap();
assert_eq!(u32::from_le_bytes(memory), esi);
Ok(())
}
#[test]
// mov dword ptr [rax+0x00000001],edi
fn test_mov_m32imm32_r32() -> MockResult {
fn test_mov_m32imm32_r32() {
let rax: u64 = 0x100;
let displacement: u64 = 0x1;
let edi: u32 = 0x8899;
@@ -435,13 +419,11 @@ mod tests {
vmm.read_memory(rax + displacement, &mut memory).unwrap();
assert_eq!(u32::from_le_bytes(memory), edi);
Ok(())
}
#[test]
// mov eax,dword ptr [rax+10h]
fn test_mov_r32_m32imm32() -> MockResult {
fn test_mov_r32_m32imm32() {
let rax: u64 = 0x100;
let displacement: u64 = 0x10;
let eax: u32 = 0xaabbccdd;
@@ -462,13 +444,11 @@ mod tests {
.read_reg(Register::EAX)
.unwrap();
assert_eq!(new_eax, eax as u64);
Ok(())
}
#[test]
// mov al,byte ptr [rax+10h]
fn test_mov_r8_m32imm32() -> MockResult {
fn test_mov_r8_m32imm32() {
let rax: u64 = 0x100;
let displacement: u64 = 0x10;
let al: u8 = 0xaa;
@@ -489,14 +469,12 @@ mod tests {
.read_reg(Register::AL)
.unwrap();
assert_eq!(new_al, al as u64);
Ok(())
}
#[test]
// mov rax, 0x100
// mov rbx, qword ptr [rax+10h]
fn test_mov_r64_imm64_and_r64_m64() -> MockResult {
fn test_mov_r64_imm64_and_r64_m64() {
let target_rax: u64 = 0x1234567812345678;
let rax: u64 = 0x100;
let displacement: u64 = 0x10;
@@ -516,14 +494,12 @@ mod tests {
.read_reg(Register::RBX)
.unwrap();
assert_eq!(rbx, target_rax);
Ok(())
}
#[test]
// mov rax, 0x100
// mov rbx, qword ptr [rax+10h]
fn test_mov_r64_imm64_and_r64_m64_first_insn() -> MockResult {
fn test_mov_r64_imm64_and_r64_m64_first_insn() {
let target_rax: u64 = 0x1234567812345678;
let rax: u64 = 0x100;
let displacement: u64 = 0x10;
@@ -547,15 +523,13 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, new_rax);
Ok(())
}
#[test]
// mov rax, 0x100
// mov rbx, qword ptr [rax+10h]
// mov rax, 0x200
fn test_mov_r64_imm64_and_r64_m64_two_insns() -> MockResult {
fn test_mov_r64_imm64_and_r64_m64_two_insns() {
let target_rax: u64 = 0x1234567812345678;
let rax: u64 = 0x100;
let displacement: u64 = 0x10;
@@ -588,13 +562,11 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, new_rax);
Ok(())
}
#[test]
// movzx eax, bl
fn test_movzx_r32_r8l() -> MockResult {
fn test_movzx_r32_r8l() {
let bx: u16 = 0x8899;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -608,13 +580,11 @@ mod tests {
.read_reg(Register::EAX)
.unwrap();
assert_eq!(eax, (bx & 0xff) as u64);
Ok(())
}
#[test]
// movzx eax, bh
fn test_movzx_r32_r8h() -> MockResult {
fn test_movzx_r32_r8h() {
let bx: u16 = 0x8899;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -628,13 +598,11 @@ mod tests {
.read_reg(Register::EAX)
.unwrap();
assert_eq!(eax, (bx >> 8) as u64);
Ok(())
}
#[test]
// movzx eax, byte ptr [rbx]
fn test_movzx_r32_m8() -> MockResult {
fn test_movzx_r32_m8() {
let rbx: u64 = 0x100;
let value: u8 = 0xaa;
let ip: u64 = 0x1000;
@@ -650,7 +618,5 @@ mod tests {
.read_reg(Register::EAX)
.unwrap();
assert_eq!(eax, value as u64);
Ok(())
}
}

12
hypervisor/src/arch/x86/emulator/mod.rs
View File

@@ -773,7 +773,7 @@ mod tests {
//
// mov rax, 0x1000
// Test with a first instruction truncated.
fn test_fetch_first_instruction() -> MockResult {
fn test_fetch_first_instruction() {
let ip: u64 = 0x1000;
let cpu_id = 0;
let memory = [
@@ -799,8 +799,6 @@ mod tests {
.read_reg(Register::RAX)
.unwrap();
assert_eq!(rax, ip);
Ok(())
}
#[test]
@@ -809,7 +807,7 @@ mod tests {
// mov rax, 0x1000
// mov rbx, qword ptr [rax+10h]
// Test with a 2nd instruction truncated.
fn test_fetch_second_instruction() -> MockResult {
fn test_fetch_second_instruction() {
let target_rax: u64 = 0x1234567812345678;
let ip: u64 = 0x1000;
let cpu_id = 0;
@@ -836,8 +834,6 @@ mod tests {
.read_reg(Register::RBX)
.unwrap();
assert_eq!(rbx, target_rax);
Ok(())
}
#[test]
@@ -846,7 +842,7 @@ mod tests {
// mov rax, 0x1000
// Test with a first instruction truncated and a bad fetched instruction.
// Verify that the instruction emulation returns an error.
fn test_fetch_bad_insn() -> MockResult {
fn test_fetch_bad_insn() {
let ip: u64 = 0x1000;
let cpu_id = 0;
let memory = [
@@ -861,7 +857,5 @@ mod tests {
let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory)));
assert!(vmm.emulate_first_insn(cpu_id, &insn).is_err());
Ok(())
}
}

6
hypervisor/src/mshv/mod.rs
View File

@@ -144,9 +144,8 @@ impl SoftTLB {
}
// Adds a gva -> gpa mapping into the TLB.
fn add_mapping(&mut self, gva: u64, gpa: u64) -> Result<(), PlatformError> {
fn add_mapping(&mut self, gva: u64, gpa: u64) {
*self.addr_map.entry(gva).or_insert(gpa) = gpa;
Ok(())
}
// Do the actual gva -> gpa translation
@@ -383,8 +382,7 @@ impl cpu::Vcpu for MshvVcpu {
// Add the GVA <-> GPA mapping.
context
.tlb
.add_mapping(info.guest_virtual_address, info.guest_physical_address)
.map_err(|e| cpu::HypervisorCpuError::RunVcpu(e.into()))?;
.add_mapping(info.guest_virtual_address, info.guest_physical_address);
// Create a new emulator.
let mut emul = Emulator::new(&mut context);