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device: Improvement for BusDevice trait and PciDevice trait

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BusDevice includes two methods which are only for PCI devices, which should
be as members of PciDevice trait for a better clean high level APIs.

Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
This commit is contained in:
Jing Liu
2019-06-05 17:24:18 +08:00
committed by Sebastien Boeuf
parent 5f7d520dc1
commit 9da2343cb7
5 changed files with 31 additions and 27 deletions
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18
vm-virtio/src/transport/pci_device.rs
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@@ -397,6 +397,15 @@ impl PciDevice for VirtioPciDevice {
}
}
fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]) {
self.configuration
.write_config_register(reg_idx, offset, data);
}
fn read_config_register(&self, reg_idx: usize) -> u32 {
self.configuration.read_reg(reg_idx)
}
fn ioeventfds(&self) -> Vec<(&EventFd, u64, u64)> {
let bar0 = self
.configuration
@@ -589,13 +598,4 @@ impl BusDevice for VirtioPciDevice {
fn write(&mut self, offset: u64, data: &[u8]) {
self.write_bar(offset, data)
}
fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]) {
self.configuration
.write_config_register(reg_idx, offset, data);
}
fn read_config_register(&self, reg_idx: usize) -> u32 {
self.configuration.read_config_register(reg_idx)
}
}