From a048fa982d0f6e251869c78f435c072eb3d43e3f Mon Sep 17 00:00:00 2001
From: Dylan Reid <dgreid@fb.com>
Date: Tue, 9 Jun 2026 21:00:10 -0700
Subject: [PATCH] devices: ivshmem: handle short BAR0 register reads

BAR0 can technially be read with 1 or 2 byte MMIO. Don't panic in that
case.

Signed-off-by: Dylan Reid <dgreid@fb.com>
---
 devices/src/ivshmem.rs | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/devices/src/ivshmem.rs b/devices/src/ivshmem.rs
index c913f9fe4..9b95acd10 100644
--- a/devices/src/ivshmem.rs
+++ b/devices/src/ivshmem.rs
@@ -10,7 +10,6 @@ use std::sync::atomic::{AtomicU32, Ordering};
 use std::sync::{Arc, Barrier, Mutex};
 
 use anyhow::anyhow;
-use byteorder::{ByteOrder, LittleEndian};
 use log::{debug, error, warn};
 use pci::{
     BarReprogrammingParams, PCI_CONFIGURATION_ID, PciBarConfiguration, PciBarPrefetchable,
@@ -335,8 +334,8 @@ impl PciDevice for IvshmemDevice {
         match bar_idx {
             // bar 0
             0 => {
-                // ivshmem don't use interrupt, we return zero now.
-                LittleEndian::write_u32(data, 0);
+                // ivshmem doesn't use an interrupt, we return zero now.
+                data.fill(0);
             }
             // bar 2
             1 => warn!("Unexpected read ivshmem memory idx: {offset}"),