From a072b9a356741859174b1ebbab122ed8462e9d82 Mon Sep 17 00:00:00 2001
From: Jinank Jain <jinankjain@microsoft.com>
Date: Wed, 7 May 2025 05:36:33 +0000
Subject: [PATCH] hypervisor: Set additional partition property for MSHV guest

For ARM64 guests we need to set three important partition property:

1) PPI interrupt ID for timer interrupt
2) PPI interrupt ID for PMU interrupts.
3) Hiding LPI support from the guest because MSHV does emulate ITS for
   the guest.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
---
 hypervisor/src/arch/aarch64/regs.rs |  2 ++
 hypervisor/src/mshv/mod.rs          | 43 +++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/hypervisor/src/arch/aarch64/regs.rs b/hypervisor/src/arch/aarch64/regs.rs
index b582e577b..10e0e49eb 100644
--- a/hypervisor/src/arch/aarch64/regs.rs
+++ b/hypervisor/src/arch/aarch64/regs.rs
@@ -224,3 +224,5 @@ pub const AARCH64_ARCH_TIMER_HYP_IRQ: u32 = 10;
 
 // PMU PPI interrupt number
 pub const AARCH64_PMU_IRQ: u32 = 7;
+
+pub const AARCH64_MIN_PPI_IRQ: u32 = 16;
diff --git a/hypervisor/src/mshv/mod.rs b/hypervisor/src/mshv/mod.rs
index e8a07903b..534e3761b 100644
--- a/hypervisor/src/mshv/mod.rs
+++ b/hypervisor/src/mshv/mod.rs
@@ -20,6 +20,10 @@ use vm::DataMatch;
 #[cfg(feature = "sev_snp")]
 use vm_memory::bitmap::AtomicBitmap;
 
+#[cfg(target_arch = "aarch64")]
+use crate::arch::aarch64::regs::{
+    AARCH64_ARCH_TIMER_VIRT_IRQ, AARCH64_MIN_PPI_IRQ, AARCH64_PMU_IRQ,
+};
 #[cfg(target_arch = "x86_64")]
 use crate::arch::emulator::PlatformEmulator;
 #[cfg(target_arch = "x86_64")]
@@ -2370,6 +2374,45 @@ impl vm::Vm for MshvVm {
     }
 
     fn init(&self) -> vm::Result<()> {
+        #[cfg(target_arch = "aarch64")]
+        {
+            self.fd
+                .set_partition_property(
+                    hv_partition_property_code_HV_PARTITION_PROPERTY_GIC_LPI_INT_ID_BITS,
+                    0,
+                )
+                .map_err(|e| {
+                    vm::HypervisorVmError::InitializeVm(anyhow!(
+                        "Failed to set GIC LPI support: {}",
+                        e
+                    ))
+                })?;
+
+            self.fd
+                .set_partition_property(
+                    hv_partition_property_code_HV_PARTITION_PROPERTY_GIC_PPI_OVERFLOW_INTERRUPT_FROM_CNTV,
+                    (AARCH64_ARCH_TIMER_VIRT_IRQ + AARCH64_MIN_PPI_IRQ) as u64,
+                )
+                .map_err(|e| {
+                    vm::HypervisorVmError::InitializeVm(anyhow!(
+                        "Failed to set arch timer interrupt ID: {}",
+                        e
+                    ))
+                })?;
+
+            self.fd
+                .set_partition_property(
+                    hv_partition_property_code_HV_PARTITION_PROPERTY_GIC_PPI_PERFORMANCE_MONITORS_INTERRUPT,
+                    (AARCH64_PMU_IRQ + AARCH64_MIN_PPI_IRQ) as u64,
+                )
+                .map_err(|e| {
+                    vm::HypervisorVmError::InitializeVm(anyhow!(
+                        "Failed to set PMU interrupt ID: {}",
+                        e
+                    ))
+                })?;
+        }
+
         self.fd
             .initialize()
             .map_err(|e| vm::HypervisorVmError::InitializeVm(e.into()))?;