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misc: Fix clippy issues

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Signed-off-by: Bo Chen <chen.bo@intel.com>
This commit is contained in:
Bo Chen
2022-11-01 14:52:40 -07:00
committed by Sebastien Boeuf
parent 9266ea4995
commit a9ec0f33c0
35 changed files with 78 additions and 92 deletions
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4
vmm/src/acpi.rs
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@@ -274,7 +274,7 @@ fn create_srat_table(numa_nodes: &NumaNodes) -> Sdt {
assert_eq!(std::mem::size_of::<MemoryAffinity>(), 40);
for (node_id, node) in numa_nodes.iter() {
let proximity_domain = *node_id as u32;
let proximity_domain = *node_id;
for region in &node.memory_regions {
srat.append(MemoryAffinity::from_region(
@@ -346,7 +346,7 @@ fn create_slit_table(numa_nodes: &NumaNodes) -> Sdt {
let dist: u8 = if *node_id == *i {
10
} else if let Some(distance) = distances.get(i) {
*distance as u8
*distance
} else {
20
};

2
vmm/src/coredump.rs
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@@ -126,7 +126,7 @@ impl CpuSegment {
CpuSegment {
selector: reg.selector as u32,
limit: reg.limit as u32,
limit: reg.limit,
flags,
pad: 0,
base: reg.base,

6
vmm/src/cpu.rs
View File

@@ -1941,7 +1941,7 @@ impl Aml for CpuManager {
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
true,
acpi_address.0 as u64,
acpi_address.0,
acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,
)]),
),
@@ -2387,8 +2387,8 @@ impl CpuElf64Writable for CpuManager {
eflags: gregs.rflags,
rsp: gregs.rsp,
ss: sregs.ss.selector as u64,
fs_base: sregs.fs.base as u64,
gs_base: sregs.gs.base as u64,
fs_base: sregs.fs.base,
gs_base: sregs.gs.base,
ds: sregs.ds.selector as u64,
es: sregs.es.selector as u64,
fs: sregs.fs.selector as u64,

6
vmm/src/device_manager.rs
View File

@@ -3059,7 +3059,7 @@ impl DeviceManager {
vfio_container
.vfio_dma_map(
region.start_addr().raw_value(),
region.len() as u64,
region.len(),
region.as_ptr() as u64,
)
.map_err(DeviceManagerError::VfioDmaMap)?;
@@ -3576,7 +3576,7 @@ impl DeviceManager {
vfio_container
.vfio_dma_map(
new_region.start_addr().raw_value(),
new_region.len() as u64,
new_region.len(),
new_region.as_ptr() as u64,
)
.map_err(DeviceManagerError::UpdateMemoryForVfioPciDevice)?;
@@ -4197,7 +4197,7 @@ impl Aml for DeviceManager {
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
true,
self.acpi_address.0 as u64,
self.acpi_address.0,
self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
)]),
),

2
vmm/src/interrupt.rs
View File

@@ -270,7 +270,7 @@ impl InterruptManager for LegacyUserspaceInterruptManager {
fn create_group(&self, config: Self::GroupConfig) -> Result<Arc<dyn InterruptSourceGroup>> {
Ok(Arc::new(LegacyUserspaceInterruptGroup::new(
self.ioapic.clone(),
config.irq as u32,
config.irq,
)))
}

4
vmm/src/lib.rs
View File

@@ -424,7 +424,7 @@ impl Vmm {
Ok(signals) => {
self.signals = Some(signals.handle());
let exit_evt = self.exit_evt.try_clone().map_err(Error::EventFdClone)?;
let on_tty = unsafe { libc::isatty(libc::STDIN_FILENO as i32) } != 0;
let on_tty = unsafe { libc::isatty(libc::STDIN_FILENO) } != 0;
let signal_handler_seccomp_filter = get_seccomp_filter(
&self.seccomp_action,
@@ -1451,7 +1451,7 @@ impl Vmm {
send_data_migration: VmSendMigrationData,
) -> result::Result<(), MigratableError> {
let path = Self::socket_url_to_path(&send_data_migration.destination_url)?;
let mut socket = UnixStream::connect(&path).map_err(|e| {
let mut socket = UnixStream::connect(path).map_err(|e| {
MigratableError::MigrateSend(anyhow!("Error connecting to UNIX socket: {}", e))
})?;

14
vmm/src/memory_manager.rs
View File

@@ -790,7 +790,7 @@ impl MemoryManager {
for (region, virtio_mem) in regions {
let slot = self.create_userspace_mapping(
region.start_addr().raw_value(),
region.len() as u64,
region.len(),
region.as_ptr() as u64,
self.mergeable,
false,
@@ -1430,7 +1430,7 @@ impl MemoryManager {
// Map it into the guest
let slot = self.create_userspace_mapping(
region.start_addr().0,
region.len() as u64,
region.len(),
region.as_ptr() as u64,
self.mergeable,
false,
@@ -1487,7 +1487,7 @@ impl MemoryManager {
slot.active = true;
slot.inserting = true;
slot.base = region.start_addr().0;
slot.length = region.len() as u64;
slot.length = region.len();
self.next_hotplug_slot += 1;
@@ -1872,7 +1872,7 @@ impl MemoryManager {
table.push(MemoryRange {
gpa: region.start_addr().raw_value(),
length: region.len() as u64,
length: region.len(),
});
}
}
@@ -2265,7 +2265,7 @@ impl Aml for MemoryManager {
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
true,
acpi_address.0 as u64,
acpi_address.0,
acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
)]),
),
@@ -2343,8 +2343,8 @@ impl Aml for MemoryManager {
#[cfg(target_arch = "x86_64")]
{
if let Some(sgx_epc_region) = &self.sgx_epc_region {
let min = sgx_epc_region.start().raw_value() as u64;
let max = min + sgx_epc_region.size() as u64 - 1;
let min = sgx_epc_region.start().raw_value();
let max = min + sgx_epc_region.size() - 1;
// SGX EPC region
aml::Device::new(
"_SB_.EPC_".into(),

2
vmm/src/pci_segment.rs
View File

@@ -159,7 +159,7 @@ impl PciSegment {
// There are 32 devices on the PCI bus, let's assign them an IRQ.
for i in 0..32 {
pci_irq_slots[i] = irqs[(i % num_irqs) as usize];
pci_irq_slots[i] = irqs[(i % num_irqs)];
}
Ok(())

4
vmm/src/vm.rs
View File

@@ -586,7 +586,7 @@ impl Vm {
)
.map_err(Error::CpuManager)?;
let on_tty = unsafe { libc::isatty(libc::STDIN_FILENO as i32) } != 0;
let on_tty = unsafe { libc::isatty(libc::STDIN_FILENO) } != 0;
#[cfg(feature = "tdx")]
let kernel = config
@@ -3336,7 +3336,7 @@ pub fn test_vm() {
let mem_region = vm.make_user_memory_region(
index as u32,
region.start_addr().raw_value(),
region.len() as u64,
region.len(),
region.as_ptr() as u64,
false,
false,