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misc: clippy: add semicolon_if_nothing_returned

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Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de>
On-behalf-of: SAP philipp.schuster@sap.com
This commit is contained in:
Philipp Schuster
2025-11-18 12:26:21 +01:00
committed by Rob Bradford
parent ea4f07d3bf
commit b4c62bf159
64 changed files with 244 additions and 236 deletions
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2
hypervisor/src/arch/aarch64/gic.rs
View File

@@ -66,7 +66,7 @@ impl<'de> Deserialize<'de> for GicState {
assert!(
std::mem::size_of::<GicStateDefaultDeserialize>()
== std::mem::size_of::<GicState>()
)
);
};
let value: serde_json::Value = Deserialize::deserialize(deserializer)?;

4
hypervisor/src/arch/x86/emulator/instructions/mov.rs
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@@ -699,7 +699,7 @@ mod unit_tests {
}
for (register, instruction_prefix) in test_inputs {
helper(register, instruction_prefix)
helper(register, instruction_prefix);
}
}
@@ -760,7 +760,7 @@ mod unit_tests {
}
for (register, instruction_prefix) in test_inputs {
helper(register, instruction_prefix)
helper(register, instruction_prefix);
}
}
}

6
hypervisor/src/arch/x86/emulator/mod.rs
View File

@@ -167,9 +167,9 @@ pub trait CpuStateManager: Clone {
}
if segment_register.db() != 0 {
segment_limit = 0xffffffff
segment_limit = 0xffffffff;
} else {
segment_limit = 0xffff
segment_limit = 0xffff;
}
}
@@ -427,7 +427,7 @@ impl CpuStateManager for EmulatorCpuState {
}
fn set_efer(&mut self, efer: u64) {
self.sregs.efer = efer
self.sregs.efer = efer;
}
fn flags(&self) -> u64 {

2
hypervisor/src/arch/x86/mod.rs
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@@ -296,7 +296,7 @@ impl LapicState {
// Following call can't fail if the offsets defined above are correct.
writer
.write_u32::<LittleEndian>(value)
.expect("Failed to write klapic register")
.expect("Failed to write klapic register");
}
}

2
hypervisor/src/mshv/mod.rs
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@@ -1399,7 +1399,7 @@ impl cpu::Vcpu for MshvVcpu {
if self.vp_index == 0 {
self.fd
.set_misc_regs(&state.misc)
.map_err(|e| cpu::HypervisorCpuError::SetMiscRegs(e.into()))?
.map_err(|e| cpu::HypervisorCpuError::SetMiscRegs(e.into()))?;
}
self.fd
.set_debug_regs(&state.dbg)