From ba115237602dbc25f1507592133abeac516b0eb1 Mon Sep 17 00:00:00 2001
From: CMGS <ilskdw@gmail.com>
Date: Sun, 28 Jun 2026 22:05:24 +0800
Subject: [PATCH] arch: x86_64: advertise additional Hyper-V CPUID
 enlightenments

Extends the Hyper-V partition feature CPUID leaf 0x40000003 with bits
that KVM emulates unconditionally and that Windows / Hyper-V-aware
guests consult to skip slow fallback paths. No KVM capability
negotiation is required for any of these -- they are hints to the
guest about what is already legal to use.

Leaf 0x40000003.EAX (HV_CPUID_FEATURES):
  bit 0  AccessVpRuntimeReg     -- HV_X64_MSR_VP_RUNTIME (0x40000010)
  bit 4  AccessIntrCtrlRegs     -- HV_X64_MSR_{EOI,ICR,TPR,APIC_ASSIST}
  bit 11 AccessFrequencyMsrs    -- HV_X64_MSR_{TSC,APIC}_FREQUENCY (skips
                                   guest TSC/APIC calibration loops)

Leaf 0x40000003.EDX (HV_CPUID_FEATURES, TLFS rev 6.0c):
  bit 4  FastHypercall          -- HV_HYPERCALL_PARAMS_XMM_AVAILABLE
  bit 8  ExtendedGvaRangesForFlushVirtualAddressList -- pairs with the
                                   tlbflush-ext recommendation bit

AccessHypercallMsrs (bit 5) and AccessVpIndex (bit 6) are already
advertised by the partition-privileges change.

Sources:
  Microsoft Hypervisor Top-Level Functional Specification 7.4.{2,5}
  qemu/qemu docs/system/i386/hyperv.rst (hv-vapic, hv-frequencies,
                                          hv-vpruntime)

Signed-off-by: CMGS <ilskdw@gmail.com>
---
 arch/src/x86_64/mod.rs | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/src/x86_64/mod.rs b/arch/src/x86_64/mod.rs
index 66f31c9f8..c3dc55753 100644
--- a/arch/src/x86_64/mod.rs
+++ b/arch/src/x86_64/mod.rs
@@ -861,13 +861,18 @@ fn required_common_cpuid_updates(
         });
         cpuid.push(CpuIdEntry {
             function: 0x4000_0003,
-            eax: (1 << 1) // AccessPartitionReferenceCounter
+            eax: (1 << 0) // AccessVpRunTimeReg
+                   | (1 << 1) // AccessPartitionReferenceCounter
                    | (1 << 2) // AccessSynicRegs
                    | (1 << 3) // AccessSyntheticTimerRegs
+                   | (1 << 4) // AccessIntrCtrlRegs (APIC access MSRs / VP Assist EOI)
                    | (1 << 5) // AccessHypercallMsrs
                    | (1 << 6) // AccessVpIndex
-                   | (1 << 9), // AccessPartitionReferenceTsc
-            edx: 1 << 3, // CPU dynamic partitioning
+                   | (1 << 9) // AccessPartitionReferenceTsc
+                   | (1 << 11), // AccessFrequencyMsrs (TSC/APIC frequency MSRs)
+            edx: (1 << 3) // CPU dynamic partitioning
+                   | (1 << 4) // FastHypercall (XMM register hypercall input)
+                   | (1 << 8), // ExtendedGvaRangesForFlushVirtualAddressList
             ..Default::default()
         });
         cpuid.push(CpuIdEntry {