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pci: Enable GSI routing (MSI type) for AArch64

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In this commit we saved the BDF of a PCI device and set it to "devid"
in GSI routing entry, because this field is mandatory for GICv3-ITS.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
This commit is contained in:
Michael Zhao
2020-06-17 21:58:15 +08:00
committed by Rob Bradford
parent 82a0e29c7a
commit cce6237536
9 changed files with 32 additions and 6 deletions
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1
pci/src/msi.rs
View File

@@ -201,6 +201,7 @@ impl MsiConfig {
high_addr: self.cap.msg_addr_hi,
low_addr: self.cap.msg_addr_lo,
data: self.cap.msg_data as u32,
devid: 0,
};
if let Err(e) = self

6
pci/src/msix.rs
View File

@@ -72,6 +72,7 @@ struct MsixConfigState {
pub struct MsixConfig {
pub table_entries: Vec<MsixTableEntry>,
pub pba_entries: Vec<u64>,
pub devid: u32,
interrupt_source_group: Arc<Box<dyn InterruptSourceGroup>>,
masked: bool,
enabled: bool,
@@ -81,6 +82,7 @@ impl MsixConfig {
pub fn new(
msix_vectors: u16,
interrupt_source_group: Arc<Box<dyn InterruptSourceGroup>>,
devid: u32,
) -> Self {
assert!(msix_vectors <= MAX_MSIX_VECTORS_PER_DEVICE);
@@ -93,6 +95,7 @@ impl MsixConfig {
MsixConfig {
table_entries,
pba_entries,
devid,
interrupt_source_group,
masked: false,
enabled: false,
@@ -124,6 +127,7 @@ impl MsixConfig {
high_addr: table_entry.msg_addr_hi,
low_addr: table_entry.msg_addr_lo,
data: table_entry.msg_data,
devid: self.devid,
};
self.interrupt_source_group
@@ -162,6 +166,7 @@ impl MsixConfig {
high_addr: table_entry.msg_addr_hi,
low_addr: table_entry.msg_addr_lo,
data: table_entry.msg_data,
devid: self.devid,
};
if let Err(e) = self
@@ -306,6 +311,7 @@ impl MsixConfig {
high_addr: table_entry.msg_addr_hi,
low_addr: table_entry.msg_addr_lo,
data: table_entry.msg_data,
devid: self.devid,
};
if let Err(e) = self.interrupt_source_group.update(

2
pci/src/vfio.rs
View File

@@ -363,7 +363,7 @@ impl VfioPciDevice {
})
.unwrap();
let msix_config = MsixConfig::new(msix_cap.table_size(), interrupt_source_group.clone());
let msix_config = MsixConfig::new(msix_cap.table_size(), interrupt_source_group.clone(), 0);
self.interrupt.msix = Some(VfioMsix {
bar: msix_config,