diff --git a/hypervisor/src/cpu.rs b/hypervisor/src/cpu.rs index 4a4738e5e..17956a9cc 100644 --- a/hypervisor/src/cpu.rs +++ b/hypervisor/src/cpu.rs @@ -515,7 +515,5 @@ pub trait Vcpu: Send + Sync { /// /// Trigger NMI interrupt /// - fn nmi(&self) -> Result<()> { - unimplemented!() - } + fn nmi(&self) -> Result<()>; } diff --git a/hypervisor/src/mshv/mod.rs b/hypervisor/src/mshv/mod.rs index 79a43c187..3a63df500 100644 --- a/hypervisor/src/mshv/mod.rs +++ b/hypervisor/src/mshv/mod.rs @@ -14,7 +14,7 @@ use crate::vec_with_array_field; use crate::vm::{self, InterruptSourceConfig, VmOps}; use crate::HypervisorType; pub use mshv_bindings::*; -use mshv_ioctls::{set_registers_64, Mshv, NoDatamatch, VcpuFd, VmFd, VmType}; +use mshv_ioctls::{set_registers_64, InterruptRequest, Mshv, NoDatamatch, VcpuFd, VmFd, VmType}; use std::any::Any; use std::collections::HashMap; use std::sync::{Arc, RwLock}; @@ -350,7 +350,6 @@ pub struct MshvVcpu { cpuid: Vec, msrs: Vec, vm_ops: Option>, - #[cfg(feature = "sev_snp")] vm_fd: Arc, } @@ -1328,6 +1327,22 @@ impl cpu::Vcpu for MshvVcpu { .set_sev_control_register(sev_control_reg) .map_err(|e| cpu::HypervisorCpuError::SetSevControlRegister(e.into())) } + /// + /// Trigger NMI interrupt + /// + fn nmi(&self) -> cpu::Result<()> { + let cfg = InterruptRequest { + interrupt_type: hv_interrupt_type_HV_X64_INTERRUPT_TYPE_NMI, + apic_id: self.vp_index as u64, + level_triggered: false, + vector: 0, + logical_destination_mode: false, + long_mode: false, + }; + self.vm_fd + .request_virtual_interrupt(&cfg) + .map_err(|e| cpu::HypervisorCpuError::Nmi(e.into())) + } } impl MshvVcpu { @@ -1623,7 +1638,6 @@ impl vm::Vm for MshvVm { cpuid: Vec::new(), msrs: self.msrs.clone(), vm_ops, - #[cfg(feature = "sev_snp")] vm_fd: self.fd.clone(), }; Ok(Arc::new(vcpu)) diff --git a/vmm/src/seccomp_filters.rs b/vmm/src/seccomp_filters.rs index 6669c39eb..e75b164cd 100644 --- a/vmm/src/seccomp_filters.rs +++ b/vmm/src/seccomp_filters.rs @@ -182,6 +182,7 @@ mod mshv { pub const MSHV_WRITE_GPA: u64 = 0x4020_b833; pub const MSHV_SEV_SNP_AP_CREATE: u64 = 0x4010_b834; pub const MSHV_ISSUE_PSP_GUEST_REQUEST: u64 = 0x4010_b831; + pub const MSHV_ASSERT_INTERRUPT: u64 = 0x4018_b809; } #[cfg(feature = "mshv")] use mshv::*; @@ -200,6 +201,7 @@ fn create_vmm_ioctl_seccomp_rule_common_mshv() -> Result, Backe and![Cond::new(1, ArgLen::Dword, Eq, MSHV_GET_VP_REGISTERS)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_SET_VP_REGISTERS)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_RUN_VP)?], + and![Cond::new(1, ArgLen::Dword, Eq, MSHV_ASSERT_INTERRUPT)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_GET_VP_STATE)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_SET_VP_STATE)?], and![Cond::new( @@ -705,6 +707,7 @@ fn create_vcpu_ioctl_seccomp_rule_mshv() -> Result, BackendErro and![Cond::new(1, ArgLen::Dword, Eq, MSHV_SET_VP_REGISTERS)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_MAP_GUEST_MEMORY)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_UNMAP_GUEST_MEMORY)?], + and![Cond::new(1, ArgLen::Dword, Eq, MSHV_ASSERT_INTERRUPT)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_VP_TRANSLATE_GVA)?], and![Cond::new(1, ArgLen::Dword, Eq, MSHV_GET_VP_CPUID_VALUES)?], and![Cond::new(