From ce5fe7f89da250760d8cae9d132cfe048102f033 Mon Sep 17 00:00:00 2001 From: Ruoqing He Date: Wed, 26 Mar 2025 17:25:24 +0800 Subject: [PATCH] hypervisor: Introduce riscv64_get_one_reg_from_vcpu macro `riscv64_get_one_reg_from_vcpu` macro is used to extract RISC-V register data from KVM Vcpu according to `$reg_name` provided to `state`. Signed-off-by: Ruoqing He --- hypervisor/src/kvm/mod.rs | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs index 1f01d9358..e46af9589 100644 --- a/hypervisor/src/kvm/mod.rs +++ b/hypervisor/src/kvm/mod.rs @@ -1493,6 +1493,31 @@ impl cpu::Vcpu for KvmVcpu { fn get_regs(&self) -> cpu::Result { let mut state = kvm_riscv_core::default(); + /// Macro used to extract RISC-V register data from KVM Vcpu according + /// to `$reg_name` provided to `state`. + macro_rules! riscv64_get_one_reg_from_vcpu { + (mode) => { + let off = offset_of!(kvm_riscv_core, mode); + let mut bytes = [0_u8; 8]; + self.fd + .lock() + .unwrap() + .get_one_reg(riscv64_reg_id!(KVM_REG_RISCV_CORE, off), &mut bytes) + .map_err(|e| cpu::HypervisorCpuError::GetRiscvCoreRegister(e.into()))?; + state.mode = u64::from_le_bytes(bytes); + }; + ($reg_name:ident) => { + let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, $reg_name); + let mut bytes = [0_u8; 8]; + self.fd + .lock() + .unwrap() + .get_one_reg(riscv64_reg_id!(KVM_REG_RISCV_CORE, off), &mut bytes) + .map_err(|e| cpu::HypervisorCpuError::GetRiscvCoreRegister(e.into()))?; + state.regs.$reg_name = u64::from_le_bytes(bytes); + }; + } + let off = offset_of!(kvm_riscv_core, regs, user_regs_struct, pc); let mut bytes = [0_u8; 8]; self.fd