diff --git a/pci/src/bus.rs b/pci/src/bus.rs
index 94f2adb41..d55047e30 100644
--- a/pci/src/bus.rs
+++ b/pci/src/bus.rs
@@ -67,7 +67,7 @@ impl PciDevice for PciRoot {
         self.config.write_config_register(reg_idx, offset, data);
     }
 
-    fn read_config_register(&self, reg_idx: usize) -> u32 {
+    fn read_config_register(&mut self, reg_idx: usize) -> u32 {
         self.config.read_reg(reg_idx)
     }
 
diff --git a/pci/src/device.rs b/pci/src/device.rs
index 16fda6f18..570043d36 100755
--- a/pci/src/device.rs
+++ b/pci/src/device.rs
@@ -61,7 +61,7 @@ pub trait PciDevice: BusDevice {
     fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]);
     /// Gets a register from the configuration space.
     /// * `reg_idx` - The index of the config register to read.
-    fn read_config_register(&self, reg_idx: usize) -> u32;
+    fn read_config_register(&mut self, reg_idx: usize) -> u32;
     /// Detects if a BAR is being reprogrammed.
     fn detect_bar_reprogramming(
         &mut self,
diff --git a/vfio/src/vfio_pci.rs b/vfio/src/vfio_pci.rs
index d41ddb35b..280cc9191 100644
--- a/vfio/src/vfio_pci.rs
+++ b/vfio/src/vfio_pci.rs
@@ -852,7 +852,7 @@ impl PciDevice for VfioPciDevice {
             .region_write(VFIO_PCI_CONFIG_REGION_INDEX, data, reg + offset);
     }
 
-    fn read_config_register(&self, reg_idx: usize) -> u32 {
+    fn read_config_register(&mut self, reg_idx: usize) -> u32 {
         // When reading the BARs, we trap it and return what comes
         // from our local configuration space. We want the guest to
         // use that and not the VFIO device BARs as it does not map
diff --git a/vm-virtio/src/transport/pci_device.rs b/vm-virtio/src/transport/pci_device.rs
index bb81a9faa..e9bcf1b79 100755
--- a/vm-virtio/src/transport/pci_device.rs
+++ b/vm-virtio/src/transport/pci_device.rs
@@ -556,7 +556,7 @@ impl PciDevice for VirtioPciDevice {
             .write_config_register(reg_idx, offset, data);
     }
 
-    fn read_config_register(&self, reg_idx: usize) -> u32 {
+    fn read_config_register(&mut self, reg_idx: usize) -> u32 {
         self.configuration.read_reg(reg_idx)
     }