pci: Add minimal PCI host emulation crate

This crate is based on the crosvm devices/src/pci implementation from 107edb3e
We introduced a few changes:

- This one is a standalone crate. The device crate does not carry any
  PCI specific bits.
- Simplified PCI root configuration. We only carry a pointer to a
  PciConfiguration, not a wrapper around it.
- Simplified BAR allocation API. All BARs from the PciDevice instance
  must be generated at once through the PciDevice.allocate_bars()
  method.
- The PCI BARs are added to the MMIO bus from the PciRoot add_device()
  method.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

pci/src/lib.rs

@@ -0,0 +1,39 @@
+// Copyright 2018 The Chromium OS Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+//! Implements pci devices and busses.
+#[macro_use]
+extern crate log;
+extern crate devices;
+extern crate kvm_ioctls;
+extern crate vm_memory;
+extern crate vmm_sys_util;
+
+mod configuration;
+mod device;
+mod root;
+
+pub use self::configuration::{
+    PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityID,
+    PciClassCode, PciConfiguration, PciHeaderType, PciProgrammingInterface, PciSerialBusSubClass,
+    PciSubclass,
+};
+pub use self::device::Error as PciDeviceError;
+pub use self::device::PciDevice;
+pub use self::root::{PciConfigIo, PciConfigMmio, PciRoot, PciRootError};
+
+/// PCI has four interrupt pins A->D.
+#[derive(Copy, Clone)]
+pub enum PciInterruptPin {
+    IntA,
+    IntB,
+    IntC,
+    IntD,
+}
+
+impl PciInterruptPin {
+    pub fn to_mask(self) -> u32 {
+        self as u32
+    }
+}