misc: clippy: add uninlined_format_args

Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de>
On-behalf-of: SAP philipp.schuster@sap.com
This commit is contained in:
Philipp Schuster
2025-11-18 12:24:47 +01:00
committed by Rob Bradford
parent 7cb73e9e56
commit ea4f07d3bf
23 changed files with 91 additions and 130 deletions

View File

@@ -25,15 +25,13 @@ fn get_op<T: CpuStateManager>(
) -> Result<u64, PlatformError> {
if insn.op_count() < op_index + 1 {
return Err(PlatformError::InvalidOperand(anyhow!(
"Invalid operand {:?}",
op_index
"Invalid operand {op_index:?}"
)));
}
if !matches!(op_size, 1 | 2 | 4 | 8) {
return Err(PlatformError::InvalidOperand(anyhow!(
"Invalid operand size {:?}",
op_size
"Invalid operand size {op_size:?}"
)));
}
@@ -59,7 +57,7 @@ fn get_op<T: CpuStateManager>(
OpKind::Immediate32 => insn.immediate32() as u64,
OpKind::Immediate32to64 => insn.immediate32to64() as u64,
OpKind::Immediate64 => insn.immediate64(),
k => return Err(PlatformError::InvalidOperand(anyhow!("{:?}", k))),
k => return Err(PlatformError::InvalidOperand(anyhow!("{k:?}"))),
};
Ok(value)
@@ -75,15 +73,13 @@ fn set_op<T: CpuStateManager>(
) -> Result<(), PlatformError> {
if insn.op_count() < op_index + 1 {
return Err(PlatformError::InvalidOperand(anyhow!(
"Invalid operand {:?}",
op_index
"Invalid operand {op_index:?}"
)));
}
if !matches!(op_size, 1 | 2 | 4 | 8) {
return Err(PlatformError::InvalidOperand(anyhow!(
"Invalid operand size {:?}",
op_size
"Invalid operand size {op_size:?}"
)));
}
@@ -100,7 +96,7 @@ fn set_op<T: CpuStateManager>(
let addr = memory_operand_address(insn, state, true)?;
platform.write_memory(addr, &value.to_le_bytes()[..op_size])?;
}
k => return Err(PlatformError::InvalidOperand(anyhow!("{:?}", k))),
k => return Err(PlatformError::InvalidOperand(anyhow!("{k:?}"))),
}
Ok(())

View File

@@ -136,9 +136,7 @@ pub trait CpuStateManager: Clone {
.checked_add(segment_register.base)
.ok_or_else(|| {
PlatformError::InvalidAddress(anyhow!(
"Logical address {:#x} cannot be linearized with segment {:#x?}",
logical_addr,
segment_register
"Logical address {logical_addr:#x} cannot be linearized with segment {segment_register:#x?}"
))
})?)
}
@@ -164,9 +162,7 @@ pub trait CpuStateManager: Clone {
if segment_type_expand_down(segment_type) {
if logical_addr >= segment_limit.into() {
return Err(PlatformError::InvalidAddress(anyhow!(
"{:#x} is off limits {:#x} (expand down)",
logical_addr,
segment_limit
"{logical_addr:#x} is off limits {segment_limit:#x} (expand down)"
)));
}
@@ -179,16 +175,14 @@ pub trait CpuStateManager: Clone {
if logical_addr > segment_limit.into() {
return Err(PlatformError::InvalidAddress(anyhow!(
"{:#x} is off limits {:#x}",
logical_addr,
segment_limit
"{logical_addr:#x} is off limits {segment_limit:#x}"
)));
}
Ok(logical_addr.wrapping_add(segment_register.base))
}
_ => Err(PlatformError::UnsupportedCpuMode(anyhow!("{:?}", mode))),
_ => Err(PlatformError::UnsupportedCpuMode(anyhow!("{mode:?}"))),
}
}
}
@@ -252,8 +246,7 @@ impl CpuStateManager for EmulatorCpuState {
r => {
return Err(PlatformError::InvalidRegister(anyhow!(
"read_reg invalid GPR {:?}",
r
"read_reg invalid GPR {r:?}"
)));
}
};
@@ -276,18 +269,17 @@ impl CpuStateManager for EmulatorCpuState {
}
} else {
return Err(PlatformError::InvalidRegister(anyhow!(
"read_reg invalid GPR {:?}",
reg
"read_reg invalid GPR {reg:?}"
)));
};
debug!("Register read: {:#x} from {:?}", reg_value, reg);
debug!("Register read: {reg_value:#x} from {reg:?}");
Ok(reg_value)
}
fn write_reg(&mut self, reg: Register, val: u64) -> Result<(), PlatformError> {
debug!("Register write: {:#x} to {:?}", val, reg);
debug!("Register write: {val:#x} to {reg:?}");
// SDM Vol 1 - 3.4.1.1
//
@@ -312,8 +304,7 @@ impl CpuStateManager for EmulatorCpuState {
}
} else {
return Err(PlatformError::InvalidRegister(anyhow!(
"write_reg invalid register {:?}",
reg
"write_reg invalid register {reg:?}"
)));
};
@@ -373,8 +364,7 @@ impl CpuStateManager for EmulatorCpuState {
Register::CR8 => set_reg!(self.sregs.cr8, mask, reg_value),
_ => {
return Err(PlatformError::InvalidRegister(anyhow!(
"write_reg invalid register {:?}",
reg
"write_reg invalid register {reg:?}"
)));
}
}
@@ -385,8 +375,7 @@ impl CpuStateManager for EmulatorCpuState {
fn read_segment(&self, reg: Register) -> Result<SegmentRegister, PlatformError> {
if !reg.is_segment_register() {
return Err(PlatformError::InvalidRegister(anyhow!(
"read_segment {:?} is not a segment register",
reg
"read_segment {reg:?} is not a segment register"
)));
}
@@ -398,8 +387,7 @@ impl CpuStateManager for EmulatorCpuState {
Register::GS => Ok(self.sregs.gs),
Register::SS => Ok(self.sregs.ss),
r => Err(PlatformError::InvalidRegister(anyhow!(
"read_segment invalid register {:?}",
r
"read_segment invalid register {r:?}"
))),
}
}
@@ -410,7 +398,7 @@ impl CpuStateManager for EmulatorCpuState {
segment_register: SegmentRegister,
) -> Result<(), PlatformError> {
if !reg.is_segment_register() {
return Err(PlatformError::InvalidRegister(anyhow!("{:?}", reg)));
return Err(PlatformError::InvalidRegister(anyhow!("{reg:?}")));
}
match reg {
@@ -420,7 +408,7 @@ impl CpuStateManager for EmulatorCpuState {
Register::FS => self.sregs.fs = segment_register,
Register::GS => self.sregs.gs = segment_register,
Register::SS => self.sregs.ss = segment_register,
r => return Err(PlatformError::InvalidRegister(anyhow!("{:?}", r))),
r => return Err(PlatformError::InvalidRegister(anyhow!("{r:?}"))),
}
Ok(())
@@ -590,7 +578,7 @@ impl<T: CpuStateManager> Emulator<'_, T> {
.fetch(last_decoded_ip, &mut fetched_insn_stream)
.map_err(EmulationError::PlatformEmulationError)?;
debug!("Fetched {:x?}", fetched_insn_stream);
debug!("Fetched {fetched_insn_stream:x?}");
// Once we have the new stream, we must create a new decoder
// and emulate one last instruction from the last decoded IP.