mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2026-08-05 02:19:16 +00:00
misc: clippy: add uninlined_format_args
Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de> On-behalf-of: SAP philipp.schuster@sap.com
This commit is contained in:
committed by
Rob Bradford
parent
7cb73e9e56
commit
ea4f07d3bf
@@ -172,6 +172,7 @@ suspicious = "deny"
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# Individual Lints
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# Individual Lints
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assertions_on_result_states = "deny"
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assertions_on_result_states = "deny"
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undocumented_unsafe_blocks = "deny"
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undocumented_unsafe_blocks = "deny"
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uninlined_format_args = "deny"
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unnecessary_semicolon = "deny"
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unnecessary_semicolon = "deny"
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[workspace.lints.rust]
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[workspace.lints.rust]
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@@ -622,7 +622,7 @@ pub fn generate_common_cpuid(
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let caps = hypervisor
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let caps = hypervisor
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.tdx_capabilities()
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.tdx_capabilities()
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.map_err(Error::TdxCapabilities)?;
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.map_err(Error::TdxCapabilities)?;
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info!("TDX capabilities {:#?}", caps);
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info!("TDX capabilities {caps:#?}");
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Some(caps)
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Some(caps)
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} else {
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} else {
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None
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None
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@@ -645,7 +645,7 @@ pub fn block_io_uring_is_supported() -> bool {
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let io_uring = match IoUring::new(1) {
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let io_uring = match IoUring::new(1) {
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Ok(io_uring) => io_uring,
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Ok(io_uring) => io_uring,
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Err(e) => {
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Err(e) => {
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info!("{} failed to create io_uring instance: {}", error_msg, e);
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info!("{error_msg} failed to create io_uring instance: {e}");
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return false;
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return false;
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}
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}
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};
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};
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@@ -658,26 +658,26 @@ pub fn block_io_uring_is_supported() -> bool {
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match submitter.register_probe(&mut probe) {
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match submitter.register_probe(&mut probe) {
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Ok(_) => {}
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Ok(_) => {}
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Err(e) => {
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Err(e) => {
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info!("{} failed to register a probe: {}", error_msg, e);
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info!("{error_msg} failed to register a probe: {e}");
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return false;
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return false;
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}
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}
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}
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}
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// Check IORING_OP_FSYNC is supported
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// Check IORING_OP_FSYNC is supported
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if !probe.is_supported(opcode::Fsync::CODE) {
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if !probe.is_supported(opcode::Fsync::CODE) {
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info!("{} IORING_OP_FSYNC operation not supported", error_msg);
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info!("{error_msg} IORING_OP_FSYNC operation not supported");
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return false;
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return false;
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}
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}
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// Check IORING_OP_READV is supported
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// Check IORING_OP_READV is supported
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if !probe.is_supported(opcode::Readv::CODE) {
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if !probe.is_supported(opcode::Readv::CODE) {
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info!("{} IORING_OP_READV operation not supported", error_msg);
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info!("{error_msg} IORING_OP_READV operation not supported");
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return false;
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return false;
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}
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}
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// Check IORING_OP_WRITEV is supported
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// Check IORING_OP_WRITEV is supported
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if !probe.is_supported(opcode::Writev::CODE) {
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if !probe.is_supported(opcode::Writev::CODE) {
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info!("{} IORING_OP_WRITEV operation not supported", error_msg);
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info!("{error_msg} IORING_OP_WRITEV operation not supported");
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return false;
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return false;
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}
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}
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@@ -167,10 +167,7 @@ impl Pausable for Gic {
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// Flush tables to guest RAM
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// Flush tables to guest RAM
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let vgic = self.vgic.as_ref().unwrap().clone();
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let vgic = self.vgic.as_ref().unwrap().clone();
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vgic.lock().unwrap().save_data_tables().map_err(|e| {
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vgic.lock().unwrap().save_data_tables().map_err(|e| {
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MigratableError::Pause(anyhow!(
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MigratableError::Pause(anyhow!("Could not save GICv3ITS GIC pending tables {e:?}",))
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"Could not save GICv3ITS GIC pending tables {:?}",
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e
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))
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})?;
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})?;
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Ok(())
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Ok(())
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}
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}
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@@ -294,7 +294,7 @@ impl BusDevice for Gpio {
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if data.len() <= 4 {
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if data.len() <= 4 {
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let value = read_le_u32(data);
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let value = read_le_u32(data);
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if let Err(e) = self.handle_write(offset, value) {
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if let Err(e) = self.handle_write(offset, value) {
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warn!("Failed to write to GPIO PL061 device: {}", e);
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warn!("Failed to write to GPIO PL061 device: {e}");
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}
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}
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} else {
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} else {
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warn!(
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warn!(
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@@ -201,12 +201,11 @@ impl BusDevice for Rtc {
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if data.len() <= 4 {
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if data.len() <= 4 {
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let v = read_le_u32(data);
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let v = read_le_u32(data);
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if let Err(e) = self.handle_write(offset, v) {
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if let Err(e) = self.handle_write(offset, v) {
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warn!("Failed to write to RTC PL031 device: {}", e);
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warn!("Failed to write to RTC PL031 device: {e}");
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}
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}
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} else {
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} else {
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warn!(
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warn!(
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"Invalid RTC PL031 write: offset {}, data length {}",
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"Invalid RTC PL031 write: offset {offset}, data length {}",
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offset,
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data.len()
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data.len()
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);
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);
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}
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}
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@@ -322,7 +322,7 @@ impl Pl011 {
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self.handle_debug();
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self.handle_debug();
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}
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}
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off => {
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off => {
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debug!("PL011: Bad write offset, offset: {}", off);
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debug!("PL011: Bad write offset, offset: {off}");
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return Err(Error::BadWriteOffset(off));
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return Err(Error::BadWriteOffset(off));
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}
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}
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}
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}
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@@ -424,12 +424,11 @@ impl BusDevice for Pl011 {
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if data.len() <= 4 {
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if data.len() <= 4 {
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let v = read_le_u32(data);
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let v = read_le_u32(data);
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if let Err(e) = self.handle_write(offset, v) {
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if let Err(e) = self.handle_write(offset, v) {
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warn!("Failed to write to PL011 device: {}", e);
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warn!("Failed to write to PL011 device: {e}");
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}
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}
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} else {
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} else {
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warn!(
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warn!(
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"Invalid PL011 write: offset {}, data length {}",
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"Invalid PL011 write: offset {offset}, data length {}",
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offset,
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data.len()
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data.len()
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);
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);
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}
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}
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@@ -491,7 +491,7 @@ impl PvmemcontrolBusDevice {
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} else {
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} else {
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std::ptr::null()
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std::ptr::null()
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};
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};
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debug!("addr {:X} length {} name {:?}", addr, length, name);
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debug!("addr {addr:X} length {length} name {name:?}");
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// SAFETY: [`base`, `base` + `len`) is guest memory
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// SAFETY: [`base`, `base` + `len`) is guest memory
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self.operate_on_memory_range(addr, length, |base, len| unsafe {
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self.operate_on_memory_range(addr, length, |base, len| unsafe {
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@@ -581,7 +581,7 @@ impl PvmemcontrolBusDevice {
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..Default::default()
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..Default::default()
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},
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},
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Error::GuestMemory(err) => {
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Error::GuestMemory(err) => {
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warn!("{}", err);
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warn!("{err}");
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PvmemcontrolResp {
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PvmemcontrolResp {
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ret_errno: (libc::EINVAL as u32).into(),
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ret_errno: (libc::EINVAL as u32).into(),
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ret_code: (func_code as u32).into(),
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ret_code: (func_code as u32).into(),
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@@ -606,7 +606,7 @@ impl PvmemcontrolBusDevice {
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let response: PvmemcontrolResp = match self.handle_request(request) {
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let response: PvmemcontrolResp = match self.handle_request(request) {
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Ok(x) => x,
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Ok(x) => x,
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Err(e) => {
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Err(e) => {
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warn!("cannot process request {:?} with error {}", request, e);
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warn!("cannot process request {request:?} with error {e}");
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return;
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return;
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}
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}
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};
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};
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@@ -25,15 +25,13 @@ fn get_op<T: CpuStateManager>(
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) -> Result<u64, PlatformError> {
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) -> Result<u64, PlatformError> {
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if insn.op_count() < op_index + 1 {
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if insn.op_count() < op_index + 1 {
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return Err(PlatformError::InvalidOperand(anyhow!(
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return Err(PlatformError::InvalidOperand(anyhow!(
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"Invalid operand {:?}",
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"Invalid operand {op_index:?}"
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op_index
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)));
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)));
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}
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}
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if !matches!(op_size, 1 | 2 | 4 | 8) {
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if !matches!(op_size, 1 | 2 | 4 | 8) {
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return Err(PlatformError::InvalidOperand(anyhow!(
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return Err(PlatformError::InvalidOperand(anyhow!(
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"Invalid operand size {:?}",
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"Invalid operand size {op_size:?}"
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op_size
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)));
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)));
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}
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}
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@@ -59,7 +57,7 @@ fn get_op<T: CpuStateManager>(
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OpKind::Immediate32 => insn.immediate32() as u64,
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OpKind::Immediate32 => insn.immediate32() as u64,
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OpKind::Immediate32to64 => insn.immediate32to64() as u64,
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OpKind::Immediate32to64 => insn.immediate32to64() as u64,
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OpKind::Immediate64 => insn.immediate64(),
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OpKind::Immediate64 => insn.immediate64(),
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k => return Err(PlatformError::InvalidOperand(anyhow!("{:?}", k))),
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k => return Err(PlatformError::InvalidOperand(anyhow!("{k:?}"))),
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};
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};
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Ok(value)
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Ok(value)
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@@ -75,15 +73,13 @@ fn set_op<T: CpuStateManager>(
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) -> Result<(), PlatformError> {
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) -> Result<(), PlatformError> {
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if insn.op_count() < op_index + 1 {
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if insn.op_count() < op_index + 1 {
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return Err(PlatformError::InvalidOperand(anyhow!(
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return Err(PlatformError::InvalidOperand(anyhow!(
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"Invalid operand {:?}",
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"Invalid operand {op_index:?}"
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op_index
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)));
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)));
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}
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}
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if !matches!(op_size, 1 | 2 | 4 | 8) {
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if !matches!(op_size, 1 | 2 | 4 | 8) {
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return Err(PlatformError::InvalidOperand(anyhow!(
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return Err(PlatformError::InvalidOperand(anyhow!(
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"Invalid operand size {:?}",
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"Invalid operand size {op_size:?}"
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op_size
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)));
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)));
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}
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}
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@@ -100,7 +96,7 @@ fn set_op<T: CpuStateManager>(
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let addr = memory_operand_address(insn, state, true)?;
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let addr = memory_operand_address(insn, state, true)?;
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platform.write_memory(addr, &value.to_le_bytes()[..op_size])?;
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platform.write_memory(addr, &value.to_le_bytes()[..op_size])?;
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}
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}
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k => return Err(PlatformError::InvalidOperand(anyhow!("{:?}", k))),
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k => return Err(PlatformError::InvalidOperand(anyhow!("{k:?}"))),
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}
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}
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Ok(())
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Ok(())
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@@ -136,9 +136,7 @@ pub trait CpuStateManager: Clone {
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.checked_add(segment_register.base)
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.checked_add(segment_register.base)
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.ok_or_else(|| {
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.ok_or_else(|| {
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PlatformError::InvalidAddress(anyhow!(
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PlatformError::InvalidAddress(anyhow!(
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"Logical address {:#x} cannot be linearized with segment {:#x?}",
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"Logical address {logical_addr:#x} cannot be linearized with segment {segment_register:#x?}"
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logical_addr,
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segment_register
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))
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))
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})?)
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})?)
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}
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}
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@@ -164,9 +162,7 @@ pub trait CpuStateManager: Clone {
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if segment_type_expand_down(segment_type) {
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if segment_type_expand_down(segment_type) {
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if logical_addr >= segment_limit.into() {
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if logical_addr >= segment_limit.into() {
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return Err(PlatformError::InvalidAddress(anyhow!(
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return Err(PlatformError::InvalidAddress(anyhow!(
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"{:#x} is off limits {:#x} (expand down)",
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"{logical_addr:#x} is off limits {segment_limit:#x} (expand down)"
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logical_addr,
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segment_limit
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)));
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)));
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}
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}
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@@ -179,16 +175,14 @@ pub trait CpuStateManager: Clone {
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if logical_addr > segment_limit.into() {
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if logical_addr > segment_limit.into() {
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return Err(PlatformError::InvalidAddress(anyhow!(
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return Err(PlatformError::InvalidAddress(anyhow!(
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"{:#x} is off limits {:#x}",
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"{logical_addr:#x} is off limits {segment_limit:#x}"
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logical_addr,
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segment_limit
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)));
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)));
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}
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}
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Ok(logical_addr.wrapping_add(segment_register.base))
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Ok(logical_addr.wrapping_add(segment_register.base))
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}
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}
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|
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_ => Err(PlatformError::UnsupportedCpuMode(anyhow!("{:?}", mode))),
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_ => Err(PlatformError::UnsupportedCpuMode(anyhow!("{mode:?}"))),
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}
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}
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}
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}
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}
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}
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@@ -252,8 +246,7 @@ impl CpuStateManager for EmulatorCpuState {
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|
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r => {
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r => {
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return Err(PlatformError::InvalidRegister(anyhow!(
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return Err(PlatformError::InvalidRegister(anyhow!(
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"read_reg invalid GPR {:?}",
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"read_reg invalid GPR {r:?}"
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r
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)));
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)));
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}
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}
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};
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};
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@@ -276,18 +269,17 @@ impl CpuStateManager for EmulatorCpuState {
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}
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}
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} else {
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} else {
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return Err(PlatformError::InvalidRegister(anyhow!(
|
return Err(PlatformError::InvalidRegister(anyhow!(
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"read_reg invalid GPR {:?}",
|
"read_reg invalid GPR {reg:?}"
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reg
|
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)));
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)));
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};
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};
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|
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debug!("Register read: {:#x} from {:?}", reg_value, reg);
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debug!("Register read: {reg_value:#x} from {reg:?}");
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|
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Ok(reg_value)
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Ok(reg_value)
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}
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}
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|
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fn write_reg(&mut self, reg: Register, val: u64) -> Result<(), PlatformError> {
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fn write_reg(&mut self, reg: Register, val: u64) -> Result<(), PlatformError> {
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debug!("Register write: {:#x} to {:?}", val, reg);
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debug!("Register write: {val:#x} to {reg:?}");
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|
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// SDM Vol 1 - 3.4.1.1
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// SDM Vol 1 - 3.4.1.1
|
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//
|
//
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@@ -312,8 +304,7 @@ impl CpuStateManager for EmulatorCpuState {
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}
|
}
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} else {
|
} else {
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return Err(PlatformError::InvalidRegister(anyhow!(
|
return Err(PlatformError::InvalidRegister(anyhow!(
|
||||||
"write_reg invalid register {:?}",
|
"write_reg invalid register {reg:?}"
|
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reg
|
|
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)));
|
)));
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};
|
};
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|
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@@ -373,8 +364,7 @@ impl CpuStateManager for EmulatorCpuState {
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Register::CR8 => set_reg!(self.sregs.cr8, mask, reg_value),
|
Register::CR8 => set_reg!(self.sregs.cr8, mask, reg_value),
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_ => {
|
_ => {
|
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return Err(PlatformError::InvalidRegister(anyhow!(
|
return Err(PlatformError::InvalidRegister(anyhow!(
|
||||||
"write_reg invalid register {:?}",
|
"write_reg invalid register {reg:?}"
|
||||||
reg
|
|
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)));
|
)));
|
||||||
}
|
}
|
||||||
}
|
}
|
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@@ -385,8 +375,7 @@ impl CpuStateManager for EmulatorCpuState {
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fn read_segment(&self, reg: Register) -> Result<SegmentRegister, PlatformError> {
|
fn read_segment(&self, reg: Register) -> Result<SegmentRegister, PlatformError> {
|
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if !reg.is_segment_register() {
|
if !reg.is_segment_register() {
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return Err(PlatformError::InvalidRegister(anyhow!(
|
return Err(PlatformError::InvalidRegister(anyhow!(
|
||||||
"read_segment {:?} is not a segment register",
|
"read_segment {reg:?} is not a segment register"
|
||||||
reg
|
|
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)));
|
)));
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}
|
}
|
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|
|
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@@ -398,8 +387,7 @@ impl CpuStateManager for EmulatorCpuState {
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Register::GS => Ok(self.sregs.gs),
|
Register::GS => Ok(self.sregs.gs),
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Register::SS => Ok(self.sregs.ss),
|
Register::SS => Ok(self.sregs.ss),
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r => Err(PlatformError::InvalidRegister(anyhow!(
|
r => Err(PlatformError::InvalidRegister(anyhow!(
|
||||||
"read_segment invalid register {:?}",
|
"read_segment invalid register {r:?}"
|
||||||
r
|
|
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))),
|
))),
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}
|
}
|
||||||
}
|
}
|
||||||
@@ -410,7 +398,7 @@ impl CpuStateManager for EmulatorCpuState {
|
|||||||
segment_register: SegmentRegister,
|
segment_register: SegmentRegister,
|
||||||
) -> Result<(), PlatformError> {
|
) -> Result<(), PlatformError> {
|
||||||
if !reg.is_segment_register() {
|
if !reg.is_segment_register() {
|
||||||
return Err(PlatformError::InvalidRegister(anyhow!("{:?}", reg)));
|
return Err(PlatformError::InvalidRegister(anyhow!("{reg:?}")));
|
||||||
}
|
}
|
||||||
|
|
||||||
match reg {
|
match reg {
|
||||||
@@ -420,7 +408,7 @@ impl CpuStateManager for EmulatorCpuState {
|
|||||||
Register::FS => self.sregs.fs = segment_register,
|
Register::FS => self.sregs.fs = segment_register,
|
||||||
Register::GS => self.sregs.gs = segment_register,
|
Register::GS => self.sregs.gs = segment_register,
|
||||||
Register::SS => self.sregs.ss = segment_register,
|
Register::SS => self.sregs.ss = segment_register,
|
||||||
r => return Err(PlatformError::InvalidRegister(anyhow!("{:?}", r))),
|
r => return Err(PlatformError::InvalidRegister(anyhow!("{r:?}"))),
|
||||||
}
|
}
|
||||||
|
|
||||||
Ok(())
|
Ok(())
|
||||||
@@ -590,7 +578,7 @@ impl<T: CpuStateManager> Emulator<'_, T> {
|
|||||||
.fetch(last_decoded_ip, &mut fetched_insn_stream)
|
.fetch(last_decoded_ip, &mut fetched_insn_stream)
|
||||||
.map_err(EmulationError::PlatformEmulationError)?;
|
.map_err(EmulationError::PlatformEmulationError)?;
|
||||||
|
|
||||||
debug!("Fetched {:x?}", fetched_insn_stream);
|
debug!("Fetched {fetched_insn_stream:x?}");
|
||||||
|
|
||||||
// Once we have the new stream, we must create a new decoder
|
// Once we have the new stream, we must create a new decoder
|
||||||
// and emulate one last instruction from the last decoded IP.
|
// and emulate one last instruction from the last decoded IP.
|
||||||
|
|||||||
@@ -627,7 +627,7 @@ impl vm::Vm for KvmVm {
|
|||||||
///
|
///
|
||||||
fn create_vgic(&self, config: VgicConfig) -> vm::Result<Arc<Mutex<dyn Vgic>>> {
|
fn create_vgic(&self, config: VgicConfig) -> vm::Result<Arc<Mutex<dyn Vgic>>> {
|
||||||
let gic_device = KvmGicV3Its::new(self, config)
|
let gic_device = KvmGicV3Its::new(self, config)
|
||||||
.map_err(|e| vm::HypervisorVmError::CreateVgic(anyhow!("Vgic error {:?}", e)))?;
|
.map_err(|e| vm::HypervisorVmError::CreateVgic(anyhow!("Vgic error {e:?}")))?;
|
||||||
Ok(Arc::new(Mutex::new(gic_device)))
|
Ok(Arc::new(Mutex::new(gic_device)))
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1971,9 +1971,7 @@ impl cpu::Vcpu for KvmVcpu {
|
|||||||
Ok(cpu::VmExit::Shutdown)
|
Ok(cpu::VmExit::Shutdown)
|
||||||
} else {
|
} else {
|
||||||
Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"Unexpected system event with type 0x{:x}, flags 0x{:x?}",
|
"Unexpected system event with type 0x{event_type:x}, flags 0x{flags:x?}",
|
||||||
event_type,
|
|
||||||
flags
|
|
||||||
)))
|
)))
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -705,7 +705,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let gva = info.guest_virtual_address;
|
let gva = info.guest_virtual_address;
|
||||||
let gpa = info.guest_physical_address;
|
let gpa = info.guest_physical_address;
|
||||||
|
|
||||||
debug!("Unmapped GPA exit: GVA {:x} GPA {:x}", gva, gpa);
|
debug!("Unmapped GPA exit: GVA {gva:x} GPA {gpa:x}");
|
||||||
|
|
||||||
let context = MshvEmulatorContext {
|
let context = MshvEmulatorContext {
|
||||||
vcpu: self,
|
vcpu: self,
|
||||||
@@ -739,7 +739,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let gva = info.guest_virtual_address;
|
let gva = info.guest_virtual_address;
|
||||||
let gpa = info.guest_physical_address;
|
let gpa = info.guest_physical_address;
|
||||||
|
|
||||||
debug!("Exit ({:?}) GVA {:x} GPA {:x}", msg_type, gva, gpa);
|
debug!("Exit ({msg_type:?}) GVA {gva:x} GPA {gpa:x}");
|
||||||
|
|
||||||
let mut context = MshvEmulatorContext {
|
let mut context = MshvEmulatorContext {
|
||||||
vcpu: self,
|
vcpu: self,
|
||||||
@@ -777,8 +777,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
assert!(num_ranges >= 1);
|
assert!(num_ranges >= 1);
|
||||||
if num_ranges > 1 {
|
if num_ranges > 1 {
|
||||||
return Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
return Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"Unhandled VCPU exit(GPA_ATTRIBUTE_INTERCEPT): Expected num_ranges to be 1 but found num_ranges {:?}",
|
"Unhandled VCPU exit(GPA_ATTRIBUTE_INTERCEPT): Expected num_ranges to be 1 but found num_ranges {num_ranges:?}"
|
||||||
num_ranges
|
|
||||||
)));
|
)));
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -786,10 +785,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let mut gpas = Vec::new();
|
let mut gpas = Vec::new();
|
||||||
let ranges = info.ranges;
|
let ranges = info.ranges;
|
||||||
let (gfn_start, gfn_count) = snp::parse_gpa_range(ranges[0]).unwrap();
|
let (gfn_start, gfn_count) = snp::parse_gpa_range(ranges[0]).unwrap();
|
||||||
debug!(
|
debug!("Releasing pages: gfn_start: {gfn_start:x?}, gfn_count: {gfn_count:?}");
|
||||||
"Releasing pages: gfn_start: {:x?}, gfn_count: {:?}",
|
|
||||||
gfn_start, gfn_count
|
|
||||||
);
|
|
||||||
let gpa_start = gfn_start * HV_PAGE_SIZE as u64;
|
let gpa_start = gfn_start * HV_PAGE_SIZE as u64;
|
||||||
for i in 0..gfn_count {
|
for i in 0..gfn_count {
|
||||||
gpas.push(gpa_start + i * HV_PAGE_SIZE as u64);
|
gpas.push(gpa_start + i * HV_PAGE_SIZE as u64);
|
||||||
@@ -818,7 +814,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
self.vm_fd
|
self.vm_fd
|
||||||
.modify_gpa_host_access(&gpa_list[0])
|
.modify_gpa_host_access(&gpa_list[0])
|
||||||
.map_err(|e| cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
.map_err(|e| cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"Unhandled VCPU exit: attribute intercept - couldn't modify host access {}", e
|
"Unhandled VCPU exit: attribute intercept - couldn't modify host access {e}"
|
||||||
)))?;
|
)))?;
|
||||||
// Guest is revoking the shared access, so we need to update the bitmap
|
// Guest is revoking the shared access, so we need to update the bitmap
|
||||||
self.host_access_pages.rcu(|_bitmap| {
|
self.host_access_pages.rcu(|_bitmap| {
|
||||||
@@ -835,9 +831,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let gpa = info.guest_physical_address;
|
let gpa = info.guest_physical_address;
|
||||||
|
|
||||||
Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"Unhandled VCPU exit: Unaccepted GPA({:x}) found at GVA({:x})",
|
"Unhandled VCPU exit: Unaccepted GPA({gpa:x}) found at GVA({gva:x})",
|
||||||
gpa,
|
|
||||||
gva,
|
|
||||||
)))
|
)))
|
||||||
}
|
}
|
||||||
#[cfg(target_arch = "x86_64")]
|
#[cfg(target_arch = "x86_64")]
|
||||||
@@ -905,8 +899,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
<< GHCB_INFO_BIT_WIDTH)
|
<< GHCB_INFO_BIT_WIDTH)
|
||||||
as u64;
|
as u64;
|
||||||
debug!(
|
debug!(
|
||||||
"GHCB_INFO_HYP_FEATURE_REQUEST: Supported features: {:0x}",
|
"GHCB_INFO_HYP_FEATURE_REQUEST: Supported features: {ghcb_response:0x}"
|
||||||
ghcb_response
|
|
||||||
);
|
);
|
||||||
let arr_reg_name_value =
|
let arr_reg_name_value =
|
||||||
[(hv_register_name_HV_X64_REGISTER_GHCB, ghcb_response)];
|
[(hv_register_name_HV_X64_REGISTER_GHCB, ghcb_response)];
|
||||||
@@ -1182,8 +1175,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
.map_err(|e| cpu::HypervisorCpuError::RunVcpu(e.into()))?;
|
.map_err(|e| cpu::HypervisorCpuError::RunVcpu(e.into()))?;
|
||||||
|
|
||||||
debug!(
|
debug!(
|
||||||
"SNP guest request: req_gpa {:0x} rsp_gpa {:0x}",
|
"SNP guest request: req_gpa {req_gpa:0x} rsp_gpa {rsp_gpa:0x}"
|
||||||
req_gpa, rsp_gpa
|
|
||||||
);
|
);
|
||||||
|
|
||||||
set_svm_field_u64_ptr!(ghcb, exit_info2, 0);
|
set_svm_field_u64_ptr!(ghcb, exit_info2, 0);
|
||||||
@@ -1194,8 +1186,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let apic_id =
|
let apic_id =
|
||||||
info.__bindgen_anon_2.__bindgen_anon_1.sw_exit_info1 >> 32;
|
info.__bindgen_anon_2.__bindgen_anon_1.sw_exit_info1 >> 32;
|
||||||
debug!(
|
debug!(
|
||||||
"SNP AP CREATE REQUEST with VMSA GPA {:0x}, and APIC ID {:?}",
|
"SNP AP CREATE REQUEST with VMSA GPA {vmsa_gpa:0x}, and APIC ID {apic_id:?}"
|
||||||
vmsa_gpa, apic_id
|
|
||||||
);
|
);
|
||||||
|
|
||||||
let mshv_ap_create_req = mshv_sev_snp_ap_create {
|
let mshv_ap_create_req = mshv_sev_snp_ap_create {
|
||||||
@@ -1220,16 +1211,14 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
Ok(cpu::VmExit::Ignore)
|
Ok(cpu::VmExit::Ignore)
|
||||||
}
|
}
|
||||||
exit => Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
exit => Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"Unhandled VCPU exit {:?}",
|
"Unhandled VCPU exit {exit:?}"
|
||||||
exit
|
|
||||||
))),
|
))),
|
||||||
},
|
},
|
||||||
|
|
||||||
Err(e) => match e.errno() {
|
Err(e) => match e.errno() {
|
||||||
libc::EAGAIN | libc::EINTR => Ok(cpu::VmExit::Ignore),
|
libc::EAGAIN | libc::EINTR => Ok(cpu::VmExit::Ignore),
|
||||||
_ => Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
_ => Err(cpu::HypervisorCpuError::RunVcpu(anyhow!(
|
||||||
"VCPU error {:?}",
|
"VCPU error {e:?}"
|
||||||
e
|
|
||||||
))),
|
))),
|
||||||
},
|
},
|
||||||
}
|
}
|
||||||
@@ -1576,7 +1565,7 @@ impl MshvVcpu {
|
|||||||
// SAFETY: Accessing a union element from bindgen generated bindings.
|
// SAFETY: Accessing a union element from bindgen generated bindings.
|
||||||
let prev_ghcb_gpa = unsafe { reg_assocs[0].value.reg64 };
|
let prev_ghcb_gpa = unsafe { reg_assocs[0].value.reg64 };
|
||||||
|
|
||||||
debug!("Prev GHCB GPA is {:x}", prev_ghcb_gpa);
|
debug!("Prev GHCB GPA is {prev_ghcb_gpa:x}");
|
||||||
|
|
||||||
let mut ghcb_gpa = hv_x64_register_sev_ghcb::default();
|
let mut ghcb_gpa = hv_x64_register_sev_ghcb::default();
|
||||||
|
|
||||||
@@ -2224,7 +2213,7 @@ impl vm::Vm for MshvVm {
|
|||||||
#[cfg(target_arch = "aarch64")]
|
#[cfg(target_arch = "aarch64")]
|
||||||
fn create_vgic(&self, config: VgicConfig) -> vm::Result<Arc<Mutex<dyn Vgic>>> {
|
fn create_vgic(&self, config: VgicConfig) -> vm::Result<Arc<Mutex<dyn Vgic>>> {
|
||||||
let gic_device = MshvGicV2M::new(self, config)
|
let gic_device = MshvGicV2M::new(self, config)
|
||||||
.map_err(|e| vm::HypervisorVmError::CreateVgic(anyhow!("Vgic error {:?}", e)))?;
|
.map_err(|e| vm::HypervisorVmError::CreateVgic(anyhow!("Vgic error {e:?}")))?;
|
||||||
|
|
||||||
// Register GICD address with the hypervisor
|
// Register GICD address with the hypervisor
|
||||||
self.fd
|
self.fd
|
||||||
@@ -2233,7 +2222,7 @@ impl vm::Vm for MshvVm {
|
|||||||
gic_device.dist_addr,
|
gic_device.dist_addr,
|
||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::CreateVgic(anyhow!("Failed to set GICD address: {}", e))
|
vm::HypervisorVmError::CreateVgic(anyhow!("Failed to set GICD address: {e}"))
|
||||||
})?;
|
})?;
|
||||||
|
|
||||||
// Register GITS address with the hypervisor
|
// Register GITS address with the hypervisor
|
||||||
@@ -2244,7 +2233,7 @@ impl vm::Vm for MshvVm {
|
|||||||
gic_device.gits_addr,
|
gic_device.gits_addr,
|
||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::CreateVgic(anyhow!("Failed to set GITS address: {}", e))
|
vm::HypervisorVmError::CreateVgic(anyhow!("Failed to set GITS address: {e}"))
|
||||||
})?;
|
})?;
|
||||||
|
|
||||||
Ok(Arc::new(Mutex::new(gic_device)))
|
Ok(Arc::new(Mutex::new(gic_device)))
|
||||||
@@ -2265,8 +2254,7 @@ impl vm::Vm for MshvVm {
|
|||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::SetVmProperty(anyhow!(
|
vm::HypervisorVmError::SetVmProperty(anyhow!(
|
||||||
"Failed to set partition property: {}",
|
"Failed to set partition property: {e}"
|
||||||
e
|
|
||||||
))
|
))
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
@@ -2281,8 +2269,7 @@ impl vm::Vm for MshvVm {
|
|||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::SetVmProperty(anyhow!(
|
vm::HypervisorVmError::SetVmProperty(anyhow!(
|
||||||
"Failed to set partition property: {}",
|
"Failed to set partition property: {e}"
|
||||||
e
|
|
||||||
))
|
))
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
@@ -2363,8 +2350,7 @@ impl vm::Vm for MshvVm {
|
|||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::InitializeVm(anyhow!(
|
vm::HypervisorVmError::InitializeVm(anyhow!(
|
||||||
"Failed to set GIC LPI support: {}",
|
"Failed to set GIC LPI support: {e}",
|
||||||
e
|
|
||||||
))
|
))
|
||||||
})?;
|
})?;
|
||||||
|
|
||||||
@@ -2375,8 +2361,7 @@ impl vm::Vm for MshvVm {
|
|||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::InitializeVm(anyhow!(
|
vm::HypervisorVmError::InitializeVm(anyhow!(
|
||||||
"Failed to set arch timer interrupt ID: {}",
|
"Failed to set arch timer interrupt ID: {e}",
|
||||||
e
|
|
||||||
))
|
))
|
||||||
})?;
|
})?;
|
||||||
|
|
||||||
@@ -2387,8 +2372,7 @@ impl vm::Vm for MshvVm {
|
|||||||
)
|
)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
vm::HypervisorVmError::InitializeVm(anyhow!(
|
vm::HypervisorVmError::InitializeVm(anyhow!(
|
||||||
"Failed to set PMU interrupt ID: {}",
|
"Failed to set PMU interrupt ID: {e}",
|
||||||
e
|
|
||||||
))
|
))
|
||||||
})?;
|
})?;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -158,7 +158,7 @@ impl PlatformEmulator for MshvEmulatorContext<'_> {
|
|||||||
.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
|
.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
|
||||||
|
|
||||||
debug!("mshv emulator: Getting new CPU state");
|
debug!("mshv emulator: Getting new CPU state");
|
||||||
debug!("mshv emulator: {:#x?}", regs);
|
debug!("mshv emulator: {regs:#x?}");
|
||||||
|
|
||||||
Ok(EmulatorCpuState { regs, sregs })
|
Ok(EmulatorCpuState { regs, sregs })
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -52,7 +52,7 @@ impl Tracer {
|
|||||||
|
|
||||||
file.flush().unwrap();
|
file.flush().unwrap();
|
||||||
|
|
||||||
warn!("Trace output: {}", path);
|
warn!("Trace output: {path}");
|
||||||
}
|
}
|
||||||
|
|
||||||
fn add_event(&mut self, event: TraceEvent) {
|
fn add_event(&mut self, event: TraceEvent) {
|
||||||
|
|||||||
@@ -757,7 +757,7 @@ impl ApiAction for VmCoredump {
|
|||||||
response_sender: Sender<ApiResponse>,
|
response_sender: Sender<ApiResponse>,
|
||||||
) -> ApiRequest {
|
) -> ApiRequest {
|
||||||
Box::new(move |vmm| {
|
Box::new(move |vmm| {
|
||||||
info!("API request event: VmCoredump {:?}", coredump_data);
|
info!("API request event: VmCoredump {coredump_data:?}");
|
||||||
|
|
||||||
let response = vmm
|
let response = vmm
|
||||||
.vm_coredump(&coredump_data.destination_url)
|
.vm_coredump(&coredump_data.destination_url)
|
||||||
|
|||||||
@@ -1266,7 +1266,7 @@ impl CpuManager {
|
|||||||
warn!("TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT not supported")
|
warn!("TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT not supported")
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
Err(e) => error!("Unexpected TDX VMCALL: {}", e),
|
Err(e) => error!("Unexpected TDX VMCALL: {e}"),
|
||||||
}
|
}
|
||||||
vcpu.vcpu.set_tdx_status(TdxExitStatus::InvalidOperand);
|
vcpu.vcpu.set_tdx_status(TdxExitStatus::InvalidOperand);
|
||||||
}
|
}
|
||||||
@@ -1922,7 +1922,7 @@ impl CpuManager {
|
|||||||
// or low (0x000xxx...).
|
// or low (0x000xxx...).
|
||||||
let high_range = extract_bits_64!(gva, 55, 1);
|
let high_range = extract_bits_64!(gva, 55, 1);
|
||||||
if high_range == 0 {
|
if high_range == 0 {
|
||||||
info!("VA (0x{:x}) range is not supported!", gva);
|
info!("VA (0x{gva:x}) range is not supported!");
|
||||||
return Ok(gva);
|
return Ok(gva);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -3447,7 +3447,7 @@ impl DeviceManager {
|
|||||||
let (pci_segment_id, pci_device_bdf, resources) =
|
let (pci_segment_id, pci_device_bdf, resources) =
|
||||||
self.pci_resources(&id, pci_segment_id)?;
|
self.pci_resources(&id, pci_segment_id)?;
|
||||||
|
|
||||||
info!("Creating pvmemcontrol device: id = {}", id);
|
info!("Creating pvmemcontrol device: id = {id}");
|
||||||
let (pvmemcontrol_pci_device, pvmemcontrol_bus_device) =
|
let (pvmemcontrol_pci_device, pvmemcontrol_bus_device) =
|
||||||
devices::pvmemcontrol::PvmemcontrolDevice::make_device(
|
devices::pvmemcontrol::PvmemcontrolDevice::make_device(
|
||||||
id.clone(),
|
id.clone(),
|
||||||
@@ -4222,7 +4222,7 @@ impl DeviceManager {
|
|||||||
) -> DeviceManagerResult<Option<Arc<Mutex<devices::IvshmemDevice>>>> {
|
) -> DeviceManagerResult<Option<Arc<Mutex<devices::IvshmemDevice>>>> {
|
||||||
let id = String::from(IVSHMEM_DEVICE_NAME);
|
let id = String::from(IVSHMEM_DEVICE_NAME);
|
||||||
let pci_segment_id = 0x0_u16;
|
let pci_segment_id = 0x0_u16;
|
||||||
info!("Creating ivshmem device {}", id);
|
info!("Creating ivshmem device {id}");
|
||||||
|
|
||||||
let (pci_segment_id, pci_device_bdf, resources) =
|
let (pci_segment_id, pci_device_bdf, resources) =
|
||||||
self.pci_resources(&id, pci_segment_id)?;
|
self.pci_resources(&id, pci_segment_id)?;
|
||||||
@@ -4982,7 +4982,7 @@ impl IvshmemOps for IvshmemHandler {
|
|||||||
size: usize,
|
size: usize,
|
||||||
backing_file: Option<PathBuf>,
|
backing_file: Option<PathBuf>,
|
||||||
) -> Result<(Arc<GuestRegionMmap>, UserspaceMapping), IvshmemError> {
|
) -> Result<(Arc<GuestRegionMmap>, UserspaceMapping), IvshmemError> {
|
||||||
info!("Creating ivshmem mem region at 0x{:x}", start_addr);
|
info!("Creating ivshmem mem region at 0x{start_addr:x}");
|
||||||
|
|
||||||
let region = MemoryManager::create_ram_region(
|
let region = MemoryManager::create_ram_region(
|
||||||
&backing_file,
|
&backing_file,
|
||||||
|
|||||||
@@ -223,11 +223,11 @@ impl MultiThreadBase for GdbStub {
|
|||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
Ok(s) => {
|
Ok(s) => {
|
||||||
error!("Unexpected response for ReadRegs: {:?}", s);
|
error!("Unexpected response for ReadRegs: {s:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request ReadRegs: {:?}", e);
|
error!("Failed to request ReadRegs: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -244,7 +244,7 @@ impl MultiThreadBase for GdbStub {
|
|||||||
) {
|
) {
|
||||||
Ok(_) => Ok(()),
|
Ok(_) => Ok(()),
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request WriteRegs: {:?}", e);
|
error!("Failed to request WriteRegs: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -267,11 +267,11 @@ impl MultiThreadBase for GdbStub {
|
|||||||
Ok(std::cmp::min(data.len(), r.len()))
|
Ok(std::cmp::min(data.len(), r.len()))
|
||||||
}
|
}
|
||||||
Ok(s) => {
|
Ok(s) => {
|
||||||
error!("Unexpected response for ReadMem: {:?}", s);
|
error!("Unexpected response for ReadMem: {s:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request ReadMem: {:?}", e);
|
error!("Failed to request ReadMem: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -289,7 +289,7 @@ impl MultiThreadBase for GdbStub {
|
|||||||
) {
|
) {
|
||||||
Ok(_) => Ok(()),
|
Ok(_) => Ok(()),
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request WriteMem: {:?}", e);
|
error!("Failed to request WriteMem: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -414,7 +414,7 @@ impl HwBreakpoint for GdbStub {
|
|||||||
match self.vm_request(payload, 0) {
|
match self.vm_request(payload, 0) {
|
||||||
Ok(_) => Ok(true),
|
Ok(_) => Ok(true),
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request SetHwBreakPoint: {:?}", e);
|
error!("Failed to request SetHwBreakPoint: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -433,7 +433,7 @@ impl HwBreakpoint for GdbStub {
|
|||||||
match self.vm_request(payload, 0) {
|
match self.vm_request(payload, 0) {
|
||||||
Ok(_) => Ok(true),
|
Ok(_) => Ok(true),
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to request SetHwBreakPoint: {:?}", e);
|
error!("Failed to request SetHwBreakPoint: {e:?}");
|
||||||
Err(TargetError::NonFatal)
|
Err(TargetError::NonFatal)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -498,7 +498,7 @@ impl run_blocking::BlockingEventLoop for GdbEventLoop {
|
|||||||
target
|
target
|
||||||
.vm_request(GdbRequestPayload::Pause, 0)
|
.vm_request(GdbRequestPayload::Pause, 0)
|
||||||
.map_err(|e| {
|
.map_err(|e| {
|
||||||
error!("Failed to pause the target: {:?}", e);
|
error!("Failed to pause the target: {e:?}");
|
||||||
"Failed to pause the target"
|
"Failed to pause the target"
|
||||||
})?;
|
})?;
|
||||||
Ok(Some(MultiThreadStopReason::Signal(Signal::SIGINT)))
|
Ok(Some(MultiThreadStopReason::Signal(Signal::SIGINT)))
|
||||||
@@ -509,7 +509,7 @@ pub fn gdb_thread(mut gdbstub: GdbStub, path: &std::path::Path) {
|
|||||||
let listener = match UnixListener::bind(path) {
|
let listener = match UnixListener::bind(path) {
|
||||||
Ok(s) => s,
|
Ok(s) => s,
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to create a Unix domain socket listener: {}", e);
|
error!("Failed to create a Unix domain socket listener: {e}");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
@@ -518,11 +518,11 @@ pub fn gdb_thread(mut gdbstub: GdbStub, path: &std::path::Path) {
|
|||||||
let (stream, addr) = match listener.accept() {
|
let (stream, addr) = match listener.accept() {
|
||||||
Ok(v) => v,
|
Ok(v) => v,
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("Failed to accept a connection from GDB: {}", e);
|
error!("Failed to accept a connection from GDB: {e}");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
info!("GDB connected from {:?}", addr);
|
info!("GDB connected from {addr:?}");
|
||||||
|
|
||||||
let connection: Box<dyn ConnectionExt<Error = std::io::Error>> = Box::new(stream);
|
let connection: Box<dyn ConnectionExt<Error = std::io::Error>> = Box::new(stream);
|
||||||
let gdb = gdbstub::stub::GdbStub::new(connection);
|
let gdb = gdbstub::stub::GdbStub::new(connection);
|
||||||
@@ -533,17 +533,17 @@ pub fn gdb_thread(mut gdbstub: GdbStub, path: &std::path::Path) {
|
|||||||
info!("GDB client has disconnected. Running...");
|
info!("GDB client has disconnected. Running...");
|
||||||
|
|
||||||
if let Err(e) = gdbstub.vm_request(GdbRequestPayload::SetSingleStep(false), 0) {
|
if let Err(e) = gdbstub.vm_request(GdbRequestPayload::SetSingleStep(false), 0) {
|
||||||
error!("Failed to disable single step: {:?}", e);
|
error!("Failed to disable single step: {e:?}");
|
||||||
}
|
}
|
||||||
|
|
||||||
if let Err(e) =
|
if let Err(e) =
|
||||||
gdbstub.vm_request(GdbRequestPayload::SetHwBreakPoint(Vec::new()), 0)
|
gdbstub.vm_request(GdbRequestPayload::SetHwBreakPoint(Vec::new()), 0)
|
||||||
{
|
{
|
||||||
error!("Failed to remove breakpoints: {:?}", e);
|
error!("Failed to remove breakpoints: {e:?}");
|
||||||
}
|
}
|
||||||
|
|
||||||
if let Err(e) = gdbstub.vm_request(GdbRequestPayload::Resume, 0) {
|
if let Err(e) = gdbstub.vm_request(GdbRequestPayload::Resume, 0) {
|
||||||
error!("Failed to resume the VM: {:?}", e);
|
error!("Failed to resume the VM: {e:?}");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
_ => {
|
_ => {
|
||||||
@@ -551,7 +551,7 @@ pub fn gdb_thread(mut gdbstub: GdbStub, path: &std::path::Path) {
|
|||||||
}
|
}
|
||||||
},
|
},
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
error!("error occurred in GDB session: {}", e);
|
error!("error occurred in GDB session: {e}");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -219,7 +219,7 @@ impl InterruptSourceGroup for LegacyUserspaceInterruptGroup {
|
|||||||
.lock()
|
.lock()
|
||||||
.unwrap()
|
.unwrap()
|
||||||
.service_irq(self.irq as usize)
|
.service_irq(self.irq as usize)
|
||||||
.map_err(|e| io::Error::other(format!("failed to inject IRQ #{}: {:?}", self.irq, e)))
|
.map_err(|e| io::Error::other(format!("failed to inject IRQ #{}: {e:?}", self.irq)))
|
||||||
}
|
}
|
||||||
|
|
||||||
fn update(
|
fn update(
|
||||||
|
|||||||
@@ -945,7 +945,7 @@ impl Vmm {
|
|||||||
})?;
|
})?;
|
||||||
#[cfg(feature = "guest_debug")]
|
#[cfg(feature = "guest_debug")]
|
||||||
let debug_evt = self.vm_debug_evt.try_clone().map_err(|e| {
|
let debug_evt = self.vm_debug_evt.try_clone().map_err(|e| {
|
||||||
MigratableError::MigrateReceive(anyhow!("Error cloning debug EventFd: {}", e))
|
MigratableError::MigrateReceive(anyhow!("Error cloning debug EventFd: {e}"))
|
||||||
})?;
|
})?;
|
||||||
let activate_evt = self.activate_evt.try_clone().map_err(|e| {
|
let activate_evt = self.activate_evt.try_clone().map_err(|e| {
|
||||||
MigratableError::MigrateReceive(anyhow!("Error cloning activate EventFd: {e}"))
|
MigratableError::MigrateReceive(anyhow!("Error cloning activate EventFd: {e}"))
|
||||||
|
|||||||
@@ -2074,7 +2074,7 @@ impl MemoryManager {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
debug!("coredump total bytes {}", total_bytes);
|
debug!("coredump total bytes {total_bytes}");
|
||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ pub fn url_to_file(url: &str) -> std::result::Result<PathBuf, GuestDebuggableErr
|
|||||||
let file: PathBuf = url
|
let file: PathBuf = url
|
||||||
.strip_prefix("file://")
|
.strip_prefix("file://")
|
||||||
.ok_or_else(|| {
|
.ok_or_else(|| {
|
||||||
GuestDebuggableError::Coredump(anyhow!("Could not extract file from URL: {}", url))
|
GuestDebuggableError::Coredump(anyhow!("Could not extract file from URL: {url}"))
|
||||||
})
|
})
|
||||||
.map(|s| s.into())?;
|
.map(|s| s.into())?;
|
||||||
|
|
||||||
|
|||||||
@@ -2072,13 +2072,12 @@ impl Vm {
|
|||||||
// No need to allocate if the section falls within guest RAM ranges
|
// No need to allocate if the section falls within guest RAM ranges
|
||||||
if boot_guest_memory.address_in_range(GuestAddress(section.address)) {
|
if boot_guest_memory.address_in_range(GuestAddress(section.address)) {
|
||||||
info!(
|
info!(
|
||||||
"Not allocating TDVF Section: {:x?} since it is already part of guest RAM",
|
"Not allocating TDVF Section: {section:x?} since it is already part of guest RAM"
|
||||||
section
|
|
||||||
);
|
);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
info!("Allocating TDVF Section: {:x?}", section);
|
info!("Allocating TDVF Section: {section:x?}");
|
||||||
self.memory_manager
|
self.memory_manager
|
||||||
.lock()
|
.lock()
|
||||||
.unwrap()
|
.unwrap()
|
||||||
@@ -2106,7 +2105,7 @@ impl Vm {
|
|||||||
let mut payload_info = None;
|
let mut payload_info = None;
|
||||||
let mut hob_offset = None;
|
let mut hob_offset = None;
|
||||||
for section in sections {
|
for section in sections {
|
||||||
info!("Populating TDVF Section: {:x?}", section);
|
info!("Populating TDVF Section: {section:x?}");
|
||||||
match section.r#type {
|
match section.r#type {
|
||||||
TdvfSectionType::Bfv | TdvfSectionType::Cfv => {
|
TdvfSectionType::Bfv | TdvfSectionType::Cfv => {
|
||||||
info!("Copying section to guest memory");
|
info!("Copying section to guest memory");
|
||||||
|
|||||||
Reference in New Issue
Block a user