From eb75a4ead7dc8a099b07dc02d011fe9410f356f4 Mon Sep 17 00:00:00 2001 From: Ruben Hakobyan Date: Thu, 28 May 2026 17:55:59 -0700 Subject: [PATCH] arch: x86_64: Set GuestPhysAddrSize in CPUID leaf 0x80000008 When generating guest CPUID, we set PhysAddrSize (EAX bits 7:0) based on the host's physical address bits. On AMD hosts with SME, get_host_cpu_phys_bits() subtracts the c-bit reduction from this value, but the code here only writes the result to bits 7:0 and leaves GuestPhysAddrSize (bits 23:16) at the unmodified host value. This creates a gap: e.g. PhysAddrSize=43 but GuestPhysAddrSize=48. Guest firmware that reads GuestPhysAddrSize will see a larger address space than the VMM provides, and may place PCI BARs beyond the MMIO bus range. However, Cloud-hypervisor sizes its MMIO bus to phys_bits. Fix by setting both PhysAddrSize (bits 7:0) and GuestPhysAddrSize (bits 23:16) to phys_bits, using mask 0xff00_ff00 instead of 0xffff_ff00. Signed-off-by: Ruben Hakobyan --- arch/src/x86_64/mod.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/src/x86_64/mod.rs b/arch/src/x86_64/mod.rs index d5ae87aed..8acd4de24 100644 --- a/arch/src/x86_64/mod.rs +++ b/arch/src/x86_64/mod.rs @@ -808,9 +808,11 @@ fn required_common_cpuid_updates( entry.ecx = leaf.ecx; entry.edx = leaf.edx; } - // Set CPU physical bits + // Set CPU physical bits and guest physical bits 0x8000_0008 => { - entry.eax = (entry.eax & 0xffff_ff00) | (config.phys_bits as u32 & 0xff); + entry.eax = (entry.eax & 0xff00_ff00) + | (config.phys_bits as u32 & 0xff) + | ((config.phys_bits as u32 & 0xff) << 16); } 0x4000_0001 => { // Enable KVM_FEATURE_MSI_EXT_DEST_ID. This allows the guest to target