hypervisor: x86: provide a generic SpecialRegisters structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
Wei Liu
2022-07-14 22:05:06 +00:00
committed by Liu Wei
parent d2b194c4f1
commit f1ab86fecb
10 changed files with 185 additions and 59 deletions

View File

@@ -46,7 +46,7 @@ use vmm_sys_util::eventfd::EventFd;
#[cfg(target_arch = "x86_64")]
pub mod x86_64;
#[cfg(target_arch = "x86_64")]
use crate::arch::x86::{StandardRegisters, NUM_IOAPIC_PINS};
use crate::arch::x86::{SpecialRegisters, StandardRegisters, NUM_IOAPIC_PINS};
#[cfg(target_arch = "x86_64")]
use crate::ClockData;
use crate::{
@@ -61,7 +61,7 @@ use kvm_bindings::{
KVM_CAP_SPLIT_IRQCHIP, KVM_GUESTDBG_ENABLE, KVM_GUESTDBG_SINGLESTEP, KVM_GUESTDBG_USE_HW_BP,
};
#[cfg(target_arch = "x86_64")]
use x86_64::{check_required_kvm_extensions, FpuState, SpecialRegisters};
use x86_64::{check_required_kvm_extensions, FpuState};
#[cfg(target_arch = "x86_64")]
pub use x86_64::{
CpuId, CpuIdEntry, ExtendedControlRegisters, LapicState, MsrEntries, VcpuKvmState, Xsave,
@@ -1273,17 +1273,20 @@ impl cpu::Vcpu for KvmVcpu {
/// Returns the vCPU special registers.
///
fn get_sregs(&self) -> cpu::Result<SpecialRegisters> {
self.fd
Ok(self
.fd
.get_sregs()
.map_err(|e| cpu::HypervisorCpuError::GetSpecialRegs(e.into()))
.map_err(|e| cpu::HypervisorCpuError::GetSpecialRegs(e.into()))?
.into())
}
#[cfg(target_arch = "x86_64")]
///
/// Sets the vCPU special registers using the `KVM_SET_SREGS` ioctl.
///
fn set_sregs(&self, sregs: &SpecialRegisters) -> cpu::Result<()> {
let sregs = (*sregs).into();
self.fd
.set_sregs(sregs)
.set_sregs(&sregs)
.map_err(|e| cpu::HypervisorCpuError::SetSpecialRegs(e.into()))
}
#[cfg(target_arch = "x86_64")]
@@ -1873,7 +1876,7 @@ impl cpu::Vcpu for KvmVcpu {
msrs,
vcpu_events,
regs: regs.into(),
sregs,
sregs: sregs.into(),
fpu,
lapic_state,
xsave,
@@ -1942,7 +1945,7 @@ impl cpu::Vcpu for KvmVcpu {
self.set_cpuid2(&state.cpuid)?;
self.set_mp_state(state.mp_state.into())?;
self.set_regs(&state.regs.into())?;
self.set_sregs(&state.sregs)?;
self.set_sregs(&state.sregs.into())?;
self.set_xsave(&state.xsave)?;
self.set_xcrs(&state.xcrs)?;
self.set_lapic(&state.lapic_state)?;

View File

@@ -8,7 +8,7 @@
//
//
use crate::arch::x86::{DescriptorTable, SegmentRegister, StandardRegisters};
use crate::arch::x86::{DescriptorTable, SegmentRegister, SpecialRegisters, StandardRegisters};
use crate::kvm::{Cap, Kvm, KvmError, KvmResult};
use serde::{Deserialize, Serialize};
@@ -19,7 +19,7 @@ pub use {
kvm_bindings::kvm_cpuid_entry2 as CpuIdEntry, kvm_bindings::kvm_dtable,
kvm_bindings::kvm_fpu as FpuState, kvm_bindings::kvm_lapic_state as LapicState,
kvm_bindings::kvm_mp_state as MpState, kvm_bindings::kvm_msr_entry as MsrEntry,
kvm_bindings::kvm_regs, kvm_bindings::kvm_segment, kvm_bindings::kvm_sregs as SpecialRegisters,
kvm_bindings::kvm_regs, kvm_bindings::kvm_segment, kvm_bindings::kvm_sregs,
kvm_bindings::kvm_vcpu_events as VcpuEvents,
kvm_bindings::kvm_xcrs as ExtendedControlRegisters, kvm_bindings::kvm_xsave as Xsave,
kvm_bindings::CpuId, kvm_bindings::MsrList, kvm_bindings::Msrs as MsrEntries,
@@ -56,7 +56,7 @@ pub struct VcpuKvmState {
pub msrs: MsrEntries,
pub vcpu_events: VcpuEvents,
pub regs: kvm_regs,
pub sregs: SpecialRegisters,
pub sregs: kvm_sregs,
pub fpu: FpuState,
pub lapic_state: LapicState,
pub xsave: Xsave,
@@ -171,3 +171,53 @@ impl From<kvm_dtable> for DescriptorTable {
}
}
}
impl From<SpecialRegisters> for kvm_sregs {
fn from(s: SpecialRegisters) -> Self {
Self {
cs: s.cs.into(),
ds: s.ds.into(),
es: s.es.into(),
fs: s.fs.into(),
gs: s.gs.into(),
ss: s.ss.into(),
tr: s.tr.into(),
ldt: s.ldt.into(),
gdt: s.gdt.into(),
idt: s.idt.into(),
cr0: s.cr0,
cr2: s.cr2,
cr3: s.cr3,
cr4: s.cr4,
cr8: s.cr8,
efer: s.efer,
apic_base: s.apic_base,
interrupt_bitmap: s.interrupt_bitmap,
}
}
}
impl From<kvm_sregs> for SpecialRegisters {
fn from(s: kvm_sregs) -> Self {
Self {
cs: s.cs.into(),
ds: s.ds.into(),
es: s.es.into(),
fs: s.fs.into(),
gs: s.gs.into(),
ss: s.ss.into(),
tr: s.tr.into(),
ldt: s.ldt.into(),
gdt: s.gdt.into(),
idt: s.idt.into(),
cr0: s.cr0,
cr2: s.cr2,
cr3: s.cr3,
cr4: s.cr4,
cr8: s.cr8,
efer: s.efer,
apic_base: s.apic_base,
interrupt_bitmap: s.interrupt_bitmap,
}
}
}