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hypervisor: x86: provide a generic SpecialRegisters structure

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Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
Wei Liu
2022-07-14 22:05:06 +00:00
committed by Liu Wei
parent d2b194c4f1
commit f1ab86fecb
10 changed files with 185 additions and 59 deletions
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15
hypervisor/src/mshv/mod.rs
View File

@@ -37,7 +37,7 @@ use std::fs::File;
use std::os::unix::io::AsRawFd;
#[cfg(target_arch = "x86_64")]
use crate::arch::x86::StandardRegisters;
use crate::arch::x86::{SpecialRegisters, StandardRegisters};
const DIRTY_BITMAP_CLEAR_DIRTY: u64 = 0x4;
const DIRTY_BITMAP_SET_DIRTY: u64 = 0x8;
@@ -296,17 +296,20 @@ impl cpu::Vcpu for MshvVcpu {
/// Returns the vCPU special registers.
///
fn get_sregs(&self) -> cpu::Result<SpecialRegisters> {
self.fd
Ok(self
.fd
.get_sregs()
.map_err(|e| cpu::HypervisorCpuError::GetSpecialRegs(e.into()))
.map_err(|e| cpu::HypervisorCpuError::GetSpecialRegs(e.into()))?
.into())
}
#[cfg(target_arch = "x86_64")]
///
/// Sets the vCPU special registers.
///
fn set_sregs(&self, sregs: &SpecialRegisters) -> cpu::Result<()> {
let sregs = (*sregs).into();
self.fd
.set_sregs(sregs)
.set_sregs(&sregs)
.map_err(|e| cpu::HypervisorCpuError::SetSpecialRegs(e.into()))
}
#[cfg(target_arch = "x86_64")]
@@ -626,7 +629,7 @@ impl cpu::Vcpu for MshvVcpu {
self.set_msrs(&state.msrs)?;
self.set_vcpu_events(&state.vcpu_events)?;
self.set_regs(&state.regs.into())?;
self.set_sregs(&state.sregs)?;
self.set_sregs(&state.sregs.into())?;
self.set_fpu(&state.fpu)?;
self.set_xcrs(&state.xcrs)?;
self.set_lapic(&state.lapic)?;
@@ -669,7 +672,7 @@ impl cpu::Vcpu for MshvVcpu {
msrs,
vcpu_events,
regs: regs.into(),
sregs,
sregs: sregs.into(),
fpu,
xcrs,
lapic,

57
hypervisor/src/mshv/x86_64/mod.rs
View File

@@ -7,7 +7,7 @@
// Copyright 2018-2019 CrowdStrike, Inc.
//
//
use crate::arch::x86::{DescriptorTable, SegmentRegister, StandardRegisters};
use crate::arch::x86::{DescriptorTable, SegmentRegister, SpecialRegisters, StandardRegisters};
use serde::{Deserialize, Serialize};
use std::fmt;
@@ -21,7 +21,8 @@ pub use {
mshv_bindings::FloatingPointUnit as FpuState, mshv_bindings::LapicState,
mshv_bindings::MiscRegs as MiscRegisters, mshv_bindings::MsrList,
mshv_bindings::Msrs as MsrEntries, mshv_bindings::Msrs,
mshv_bindings::SegmentRegister as MshvSegmentRegister, mshv_bindings::SpecialRegisters,
mshv_bindings::SegmentRegister as MshvSegmentRegister,
mshv_bindings::SpecialRegisters as MshvSpecialRegisters,
mshv_bindings::StandardRegisters as MshvStandardRegisters, mshv_bindings::SuspendRegisters,
mshv_bindings::TableRegister, mshv_bindings::VcpuEvents, mshv_bindings::XSave as Xsave,
mshv_bindings::Xcrs as ExtendedControlRegisters,
@@ -34,7 +35,7 @@ pub struct VcpuMshvState {
pub msrs: MsrEntries,
pub vcpu_events: VcpuEvents,
pub regs: MshvStandardRegisters,
pub sregs: SpecialRegisters,
pub sregs: MshvSpecialRegisters,
pub fpu: FpuState,
pub xcrs: ExtendedControlRegisters,
pub lapic: LapicState,
@@ -173,3 +174,53 @@ impl From<TableRegister> for DescriptorTable {
}
}
}
impl From<SpecialRegisters> for MshvSpecialRegisters {
fn from(s: SpecialRegisters) -> Self {
Self {
cs: s.cs.into(),
ds: s.ds.into(),
es: s.es.into(),
fs: s.fs.into(),
gs: s.gs.into(),
ss: s.ss.into(),
tr: s.tr.into(),
ldt: s.ldt.into(),
gdt: s.gdt.into(),
idt: s.idt.into(),
cr0: s.cr0,
cr2: s.cr2,
cr3: s.cr3,
cr4: s.cr4,
cr8: s.cr8,
efer: s.efer,
apic_base: s.apic_base,
interrupt_bitmap: s.interrupt_bitmap,
}
}
}
impl From<MshvSpecialRegisters> for SpecialRegisters {
fn from(s: MshvSpecialRegisters) -> Self {
Self {
cs: s.cs.into(),
ds: s.ds.into(),
es: s.es.into(),
fs: s.fs.into(),
gs: s.gs.into(),
ss: s.ss.into(),
tr: s.tr.into(),
ldt: s.ldt.into(),
gdt: s.gdt.into(),
idt: s.idt.into(),
cr0: s.cr0,
cr2: s.cr2,
cr3: s.cr3,
cr4: s.cr4,
cr8: s.cr8,
efer: s.efer,
apic_base: s.apic_base,
interrupt_bitmap: s.interrupt_bitmap,
}
}
}