hypervisor: x86: provide a generic SpecialRegisters structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
Wei Liu
2022-07-14 22:05:06 +00:00
committed by Liu Wei
parent d2b194c4f1
commit f1ab86fecb
10 changed files with 185 additions and 59 deletions

View File

@@ -4,9 +4,7 @@
//
#[cfg(target_arch = "x86_64")]
use hypervisor::arch::x86::SegmentRegister;
#[cfg(target_arch = "x86_64")]
use hypervisor::kvm::kvm_bindings::kvm_dtable as DTableRegister;
use hypervisor::arch::x86::{DescriptorTable, SegmentRegister};
use linux_loader::elf;
use std::fs::File;
use std::io::Write;
@@ -135,7 +133,7 @@ impl CpuSegment {
}
}
pub fn new_from_table(reg: DTableRegister) -> Self {
pub fn new_from_table(reg: DescriptorTable) -> Self {
CpuSegment {
selector: 0,
limit: reg.limit as u32,

View File

@@ -37,15 +37,13 @@ use gdbstub_arch::x86::reg::{X86SegmentRegs, X86_64CoreRegs};
#[cfg(feature = "guest_debug")]
use hypervisor::arch::x86::msr_index;
#[cfg(all(target_arch = "x86_64", feature = "gdb"))]
use hypervisor::arch::x86::StandardRegisters;
use hypervisor::arch::x86::{SpecialRegisters, StandardRegisters};
#[cfg(target_arch = "aarch64")]
use hypervisor::kvm::kvm_bindings;
#[cfg(feature = "tdx")]
use hypervisor::kvm::{TdxExitDetails, TdxExitStatus};
#[cfg(target_arch = "x86_64")]
use hypervisor::x86_64::CpuId;
#[cfg(all(target_arch = "x86_64", feature = "gdb"))]
use hypervisor::x86_64::SpecialRegisters;
#[cfg(feature = "guest_debug")]
use hypervisor::x86_64::{MsrEntries, MsrEntry};
use hypervisor::{CpuState, HypervisorCpuError, VmExit, VmOps};
@@ -2287,14 +2285,14 @@ impl CpuElf64Writable for CpuManager {
.map_err(|_e| GuestDebuggableError::Coredump(anyhow!("get msr failed")))?;
let kernel_gs_base = msrs.as_slice()[0].data;
let cs = CpuSegment::new(sregs.cs.into());
let ds = CpuSegment::new(sregs.ds.into());
let es = CpuSegment::new(sregs.es.into());
let fs = CpuSegment::new(sregs.fs.into());
let gs = CpuSegment::new(sregs.gs.into());
let ss = CpuSegment::new(sregs.ss.into());
let ldt = CpuSegment::new(sregs.ldt.into());
let tr = CpuSegment::new(sregs.tr.into());
let cs = CpuSegment::new(sregs.cs);
let ds = CpuSegment::new(sregs.ds);
let es = CpuSegment::new(sregs.es);
let fs = CpuSegment::new(sregs.fs);
let gs = CpuSegment::new(sregs.gs);
let ss = CpuSegment::new(sregs.ss);
let ldt = CpuSegment::new(sregs.ldt);
let tr = CpuSegment::new(sregs.tr);
let gdt = CpuSegment::new_from_table(sregs.gdt);
let idt = CpuSegment::new_from_table(sregs.idt);
let cr = [sregs.cr0, sregs.cr8, sregs.cr2, sregs.cr3, sregs.cr4];