hypervisor: Implement support for fetching sys regs on MSHV

ARM64 system register constants are not 1:1 mapped to MSHV definition of
those registers so we need a small helper function to translate that
mapping before retrieving those system registers.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor/src/cpu.rs

@@ -323,7 +323,13 @@ pub enum HypervisorCpuError {
     #[cfg(feature = "sev_snp")]
     #[error("Failed to set sev control register: {0}")]
     SetSevControlRegister(#[source] anyhow::Error),
-
+    ///
+    /// Unsupported SysReg registers
+    ///
+    #[cfg(target_arch = "aarch64")]
+    #[error("Unsupported SysReg registers: {0}")]
+    UnsupportedSysReg(u32),
+    ///
     /// Error injecting NMI
     ///
     #[error("Failed to inject NMI")]