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https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2026-08-05 02:19:16 +00:00
hypervisor: x86: provide a generic MsrEntry structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
@@ -37,7 +37,9 @@ use std::fs::File;
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use std::os::unix::io::AsRawFd;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, FpuState, LapicState, SpecialRegisters, StandardRegisters};
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use crate::arch::x86::{
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CpuIdEntry, FpuState, LapicState, MsrEntry, SpecialRegisters, StandardRegisters,
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};
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const DIRTY_BITMAP_CLEAR_DIRTY: u64 = 0x4;
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const DIRTY_BITMAP_SET_DIRTY: u64 = 0x8;
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@@ -346,13 +348,19 @@ impl cpu::Vcpu for MshvVcpu {
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/// Returns the model-specific registers (MSR) for this vCPU.
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///
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fn get_msrs(&self, msrs: &mut Vec<MsrEntry>) -> cpu::Result<usize> {
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let mut mshv_msrs = MsrEntries::from_entries(msrs).unwrap();
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let mshv_msrs: Vec<msr_entry> = msrs.iter().map(|e| (*e).into()).collect();
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let mut mshv_msrs = MsrEntries::from_entries(&mshv_msrs).unwrap();
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let succ = self
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.fd
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.get_msrs(&mut mshv_msrs)
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.map_err(|e| cpu::HypervisorCpuError::GetMsrEntries(e.into()))?;
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msrs[..succ].copy_from_slice(&mshv_msrs.as_slice()[..succ]);
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msrs[..succ].copy_from_slice(
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&mshv_msrs.as_slice()[..succ]
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.iter()
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.map(|e| (*e).into())
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.collect::<Vec<MsrEntry>>(),
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);
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Ok(succ)
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}
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@@ -362,7 +370,8 @@ impl cpu::Vcpu for MshvVcpu {
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/// Returns the number of MSR entries actually written.
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///
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fn set_msrs(&self, msrs: &[MsrEntry]) -> cpu::Result<usize> {
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let mshv_msrs = MsrEntries::from_entries(msrs).unwrap();
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let mshv_msrs: Vec<msr_entry> = msrs.iter().map(|e| (*e).into()).collect();
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let mshv_msrs = MsrEntries::from_entries(&mshv_msrs).unwrap();
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self.fd
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.set_msrs(&mshv_msrs)
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.map_err(|e| cpu::HypervisorCpuError::SetMsrEntries(e.into()))
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